Lines Matching refs:ctrl
30 static inline struct pci_dev *ctrl_dev(struct controller *ctrl) in ctrl_dev() argument
32 return ctrl->pcie->port; in ctrl_dev()
39 static inline int pciehp_request_irq(struct controller *ctrl) in pciehp_request_irq() argument
41 int retval, irq = ctrl->pcie->irq; in pciehp_request_irq()
44 ctrl->poll_thread = kthread_run(&pciehp_poll, ctrl, in pciehp_request_irq()
46 slot_name(ctrl->slot)); in pciehp_request_irq()
47 return PTR_ERR_OR_ZERO(ctrl->poll_thread); in pciehp_request_irq()
52 IRQF_SHARED, MY_NAME, ctrl); in pciehp_request_irq()
54 ctrl_err(ctrl, "Cannot get irq %d for the hotplug controller\n", in pciehp_request_irq()
59 static inline void pciehp_free_irq(struct controller *ctrl) in pciehp_free_irq() argument
62 kthread_stop(ctrl->poll_thread); in pciehp_free_irq()
64 free_irq(ctrl->pcie->irq, ctrl); in pciehp_free_irq()
67 static int pcie_poll_cmd(struct controller *ctrl, int timeout) in pcie_poll_cmd() argument
69 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_poll_cmd()
75 ctrl_info(ctrl, "%s: no response from device\n", in pcie_poll_cmd()
93 static void pcie_wait_cmd(struct controller *ctrl) in pcie_wait_cmd() argument
97 unsigned long cmd_timeout = ctrl->cmd_started + duration; in pcie_wait_cmd()
105 if (NO_CMD_CMPL(ctrl)) in pcie_wait_cmd()
108 if (!ctrl->cmd_busy) in pcie_wait_cmd()
121 if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE && in pcie_wait_cmd()
122 ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE) in pcie_wait_cmd()
123 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout); in pcie_wait_cmd()
125 rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout)); in pcie_wait_cmd()
128 ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n", in pcie_wait_cmd()
129 ctrl->slot_ctrl, in pcie_wait_cmd()
130 jiffies_to_msecs(jiffies - ctrl->cmd_started)); in pcie_wait_cmd()
138 static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd, in pcie_do_write_cmd() argument
141 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_do_write_cmd()
144 mutex_lock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
149 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
153 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pcie_do_write_cmd()
160 ctrl->cmd_busy = 1; in pcie_do_write_cmd()
163 ctrl->cmd_started = jiffies; in pcie_do_write_cmd()
164 ctrl->slot_ctrl = slot_ctrl; in pcie_do_write_cmd()
175 ctrl->cmd_busy = 0; in pcie_do_write_cmd()
182 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
185 mutex_unlock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
194 static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd() argument
196 pcie_do_write_cmd(ctrl, cmd, mask, true); in pcie_write_cmd()
200 static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd_nowait() argument
202 pcie_do_write_cmd(ctrl, cmd, mask, false); in pcie_write_cmd_nowait()
205 bool pciehp_check_link_active(struct controller *ctrl) in pciehp_check_link_active() argument
207 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_active()
215 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_active()
220 static void pcie_wait_link_active(struct controller *ctrl) in pcie_wait_link_active() argument
222 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_wait_link_active()
253 int pciehp_check_link_status(struct controller *ctrl) in pciehp_check_link_status() argument
255 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_status()
264 if (ctrl->link_active_reporting) in pciehp_check_link_status()
265 pcie_wait_link_active(ctrl); in pciehp_check_link_status()
271 found = pci_bus_check_dev(ctrl->pcie->port->subordinate, in pciehp_check_link_status()
277 &ctrl->pending_events); in pciehp_check_link_status()
280 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_status()
283 ctrl_err(ctrl, "link training error: status %#06x\n", in pciehp_check_link_status()
288 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); in pciehp_check_link_status()
296 static int __pciehp_link_set(struct controller *ctrl, bool enable) in __pciehp_link_set() argument
298 struct pci_dev *pdev = ctrl_dev(ctrl); in __pciehp_link_set()
309 ctrl_dbg(ctrl, "%s: lnk_ctrl = %x\n", __func__, lnk_ctrl); in __pciehp_link_set()
313 static int pciehp_link_enable(struct controller *ctrl) in pciehp_link_enable() argument
315 return __pciehp_link_set(ctrl, true); in pciehp_link_enable()
322 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_get_raw_indicator_status()
334 struct controller *ctrl = slot->ctrl; in pciehp_get_attention_status() local
335 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_attention_status()
341 ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__, in pciehp_get_attention_status()
342 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_attention_status()
362 struct controller *ctrl = slot->ctrl; in pciehp_get_power_status() local
363 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_power_status()
367 ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, in pciehp_get_power_status()
368 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_power_status()
385 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_get_latch_status()
394 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_get_adapter_status()
403 struct pci_dev *pdev = ctrl_dev(slot->ctrl); in pciehp_query_power_fault()
414 struct controller *ctrl = slot->ctrl; in pciehp_set_raw_indicator_status() local
415 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_set_raw_indicator_status()
418 pcie_write_cmd_nowait(ctrl, status << 6, in pciehp_set_raw_indicator_status()
426 struct controller *ctrl = slot->ctrl; in pciehp_set_attention_status() local
429 if (!ATTN_LED(ctrl)) in pciehp_set_attention_status()
445 pcie_write_cmd_nowait(ctrl, slot_cmd, PCI_EXP_SLTCTL_AIC); in pciehp_set_attention_status()
446 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_set_attention_status()
447 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); in pciehp_set_attention_status()
452 struct controller *ctrl = slot->ctrl; in pciehp_green_led_on() local
454 if (!PWR_LED(ctrl)) in pciehp_green_led_on()
457 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON, in pciehp_green_led_on()
459 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_green_led_on()
460 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_green_led_on()
466 struct controller *ctrl = slot->ctrl; in pciehp_green_led_off() local
468 if (!PWR_LED(ctrl)) in pciehp_green_led_off()
471 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF, in pciehp_green_led_off()
473 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_green_led_off()
474 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_green_led_off()
480 struct controller *ctrl = slot->ctrl; in pciehp_green_led_blink() local
482 if (!PWR_LED(ctrl)) in pciehp_green_led_blink()
485 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK, in pciehp_green_led_blink()
487 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_green_led_blink()
488 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_green_led_blink()
494 struct controller *ctrl = slot->ctrl; in pciehp_power_on_slot() local
495 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_power_on_slot()
504 ctrl->power_fault_detected = 0; in pciehp_power_on_slot()
506 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC); in pciehp_power_on_slot()
507 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_on_slot()
508 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_on_slot()
511 retval = pciehp_link_enable(ctrl); in pciehp_power_on_slot()
513 ctrl_err(ctrl, "%s: Can not enable the link!\n", __func__); in pciehp_power_on_slot()
520 struct controller *ctrl = slot->ctrl; in pciehp_power_off_slot() local
522 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC); in pciehp_power_off_slot()
523 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_off_slot()
524 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_off_slot()
530 struct controller *ctrl = (struct controller *)dev_id; in pciehp_isr() local
531 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_isr()
551 atomic_or(RERUN_ISR, &ctrl->pending_events); in pciehp_isr()
558 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pciehp_isr()
576 if (ctrl->power_fault_detected) in pciehp_isr()
586 ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", events); in pciehp_isr()
595 ctrl->cmd_busy = 0; in pciehp_isr()
597 wake_up(&ctrl->queue); in pciehp_isr()
606 ctrl_dbg(ctrl, "ignoring hotplug event %#06x\n", events); in pciehp_isr()
611 atomic_or(events, &ctrl->pending_events); in pciehp_isr()
617 struct controller *ctrl = (struct controller *)dev_id; in pciehp_ist() local
618 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_ist()
619 struct slot *slot = ctrl->slot; in pciehp_ist()
626 if (atomic_fetch_and(~RERUN_ISR, &ctrl->pending_events) & RERUN_ISR) { in pciehp_ist()
636 events = atomic_xchg(&ctrl->pending_events, 0); in pciehp_ist()
644 ctrl_info(ctrl, "Slot(%s): Attention button pressed\n", in pciehp_ist()
650 if ((events & PCI_EXP_SLTSTA_PFD) && !ctrl->power_fault_detected) { in pciehp_ist()
651 ctrl->power_fault_detected = 1; in pciehp_ist()
652 ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(slot)); in pciehp_ist()
661 down_read(&ctrl->reset_lock); in pciehp_ist()
666 up_read(&ctrl->reset_lock); in pciehp_ist()
669 wake_up(&ctrl->requester); in pciehp_ist()
675 struct controller *ctrl = data; in pciehp_poll() local
681 while (pciehp_isr(IRQ_NOTCONNECTED, ctrl) == IRQ_WAKE_THREAD || in pciehp_poll()
682 atomic_read(&ctrl->pending_events)) in pciehp_poll()
683 pciehp_ist(IRQ_NOTCONNECTED, ctrl); in pciehp_poll()
694 static void pcie_enable_notification(struct controller *ctrl) in pcie_enable_notification() argument
715 if (ATTN_BUTTN(ctrl)) in pcie_enable_notification()
727 pcie_write_cmd_nowait(ctrl, cmd, mask); in pcie_enable_notification()
728 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_enable_notification()
729 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); in pcie_enable_notification()
732 static void pcie_disable_notification(struct controller *ctrl) in pcie_disable_notification() argument
740 pcie_write_cmd(ctrl, 0, mask); in pcie_disable_notification()
741 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_disable_notification()
742 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pcie_disable_notification()
745 void pcie_clear_hotplug_events(struct controller *ctrl) in pcie_clear_hotplug_events() argument
747 pcie_capability_write_word(ctrl_dev(ctrl), PCI_EXP_SLTSTA, in pcie_clear_hotplug_events()
761 struct controller *ctrl = slot->ctrl; in pciehp_reset_slot() local
762 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_reset_slot()
769 down_write(&ctrl->reset_lock); in pciehp_reset_slot()
771 if (!ATTN_BUTTN(ctrl)) { in pciehp_reset_slot()
778 pcie_write_cmd(ctrl, 0, ctrl_mask); in pciehp_reset_slot()
779 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
780 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pciehp_reset_slot()
782 rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port); in pciehp_reset_slot()
785 pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask); in pciehp_reset_slot()
786 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
787 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); in pciehp_reset_slot()
789 up_write(&ctrl->reset_lock); in pciehp_reset_slot()
793 int pcie_init_notification(struct controller *ctrl) in pcie_init_notification() argument
795 if (pciehp_request_irq(ctrl)) in pcie_init_notification()
797 pcie_enable_notification(ctrl); in pcie_init_notification()
798 ctrl->notification_enabled = 1; in pcie_init_notification()
802 void pcie_shutdown_notification(struct controller *ctrl) in pcie_shutdown_notification() argument
804 if (ctrl->notification_enabled) { in pcie_shutdown_notification()
805 pcie_disable_notification(ctrl); in pcie_shutdown_notification()
806 pciehp_free_irq(ctrl); in pcie_shutdown_notification()
807 ctrl->notification_enabled = 0; in pcie_shutdown_notification()
811 static int pcie_init_slot(struct controller *ctrl) in pcie_init_slot() argument
813 struct pci_bus *subordinate = ctrl_dev(ctrl)->subordinate; in pcie_init_slot()
824 slot->ctrl = ctrl; in pcie_init_slot()
827 ctrl->slot = slot; in pcie_init_slot()
831 static void pcie_cleanup_slot(struct controller *ctrl) in pcie_cleanup_slot() argument
833 struct slot *slot = ctrl->slot; in pcie_cleanup_slot()
839 static inline void dbg_ctrl(struct controller *ctrl) in dbg_ctrl() argument
841 struct pci_dev *pdev = ctrl->pcie->port; in dbg_ctrl()
847 ctrl_info(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap); in dbg_ctrl()
849 ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16); in dbg_ctrl()
851 ctrl_info(ctrl, "Slot Control : 0x%04x\n", reg16); in dbg_ctrl()
858 struct controller *ctrl; in pcie_init() local
863 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); in pcie_init()
864 if (!ctrl) in pcie_init()
867 ctrl->pcie = dev; in pcie_init()
880 ctrl->slot_cap = slot_cap; in pcie_init()
881 mutex_init(&ctrl->ctrl_lock); in pcie_init()
882 init_rwsem(&ctrl->reset_lock); in pcie_init()
883 init_waitqueue_head(&ctrl->requester); in pcie_init()
884 init_waitqueue_head(&ctrl->queue); in pcie_init()
885 dbg_ctrl(ctrl); in pcie_init()
890 ctrl->link_active_reporting = 1; in pcie_init()
898 …ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interl… in pcie_init()
912 if (pcie_init_slot(ctrl)) in pcie_init()
919 if (POWER_CTRL(ctrl)) { in pcie_init()
920 pciehp_get_adapter_status(ctrl->slot, &occupied); in pcie_init()
921 pciehp_get_power_status(ctrl->slot, &poweron); in pcie_init()
923 pcie_disable_notification(ctrl); in pcie_init()
924 pciehp_power_off_slot(ctrl->slot); in pcie_init()
928 return ctrl; in pcie_init()
931 kfree(ctrl); in pcie_init()
936 void pciehp_release_ctrl(struct controller *ctrl) in pciehp_release_ctrl() argument
938 pcie_cleanup_slot(ctrl); in pciehp_release_ctrl()
939 kfree(ctrl); in pciehp_release_ctrl()