199 static inline u32 advk_readl(struct advk_pcie *pcie, u64 reg)  in advk_readl()  function
208 	val = advk_readl(pcie, CFG_REG);  in advk_pcie_link_up()
237 	reg = advk_readl(pcie, CTRL_CONFIG_REG);  in advk_pcie_setup_hw()
243 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);  in advk_pcie_setup_hw()
268 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);  in advk_pcie_setup_hw()
274 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);  in advk_pcie_setup_hw()
280 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);  in advk_pcie_setup_hw()
285 	reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);  in advk_pcie_setup_hw()
308 	reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);  in advk_pcie_setup_hw()
313 	reg = advk_readl(pcie, PIO_CTRL);  in advk_pcie_setup_hw()
318 	reg = advk_readl(pcie, PCIE_CORE_LINK_CTRL_STAT_REG);  in advk_pcie_setup_hw()
328 	reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);  in advk_pcie_setup_hw()
342 	reg = advk_readl(pcie, PIO_STAT);  in advk_pcie_check_pio_status()
370 		str_posted, strcomp_status, reg, advk_readl(pcie, PIO_ADDR_LS));  in advk_pcie_check_pio_status()
383 		start = advk_readl(pcie, PIO_START);  in advk_pcie_wait_pio()
384 		isr = advk_readl(pcie, PIO_ISR);  in advk_pcie_wait_pio()
419 	reg = advk_readl(pcie, PIO_CTRL);  in advk_pcie_rd_conf()
445 	*val = advk_readl(pcie, PIO_RD_DATA);  in advk_pcie_rd_conf()
474 	reg = advk_readl(pcie, PIO_CTRL);  in advk_pcie_wr_conf()
581 	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);  in advk_pcie_irq_mask()
592 	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);  in advk_pcie_irq_unmask()
718 	msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);  in advk_pcie_handle_msi()
719 	msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);  in advk_pcie_handle_msi()
727 		msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF;  in advk_pcie_handle_msi()
741 	isr0_val = advk_readl(pcie, PCIE_ISR0_REG);  in advk_pcie_handle_int()
742 	isr0_mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);  in advk_pcie_handle_int()
745 	isr1_val = advk_readl(pcie, PCIE_ISR1_REG);  in advk_pcie_handle_int()
746 	isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);  in advk_pcie_handle_int()
777 	status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG);  in advk_pcie_irq_handler()