Lines Matching refs:ctrl_config
1758 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_disable_ctrl()
1759 ctrl->ctrl_config &= ~NVME_CC_ENABLE; in nvme_disable_ctrl()
1761 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_disable_ctrl()
1791 ctrl->ctrl_config = NVME_CC_CSS_NVM; in nvme_enable_ctrl()
1792 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; in nvme_enable_ctrl()
1793 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; in nvme_enable_ctrl()
1794 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; in nvme_enable_ctrl()
1795 ctrl->ctrl_config |= NVME_CC_ENABLE; in nvme_enable_ctrl()
1797 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_enable_ctrl()
1810 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_shutdown_ctrl()
1811 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; in nvme_shutdown_ctrl()
1813 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_shutdown_ctrl()
3363 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); in nvme_ctrl_pp_status()