Lines Matching refs:iowrite64
891 iowrite64(addr, mmio + xlat_reg); in intel_ntb_mw_set_trans()
894 iowrite64(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
899 iowrite64(limit, mmio + limit_reg); in intel_ntb_mw_set_trans()
902 iowrite64(base, mmio + limit_reg); in intel_ntb_mw_set_trans()
903 iowrite64(0, mmio + xlat_reg); in intel_ntb_mw_set_trans()
1388 iowrite64(bar_addr, mmio + XEON_SBAR0BASE_OFFSET); in xeon_setup_b2b_mw()
1396 iowrite64(bar_addr, mmio + XEON_SBAR23BASE_OFFSET); in xeon_setup_b2b_mw()
1403 iowrite64(bar_addr, mmio + XEON_SBAR45BASE_OFFSET); in xeon_setup_b2b_mw()
1423 iowrite64(bar_addr, mmio + XEON_SBAR23LMT_OFFSET); in xeon_setup_b2b_mw()
1430 iowrite64(bar_addr, mmio + XEON_SBAR45LMT_OFFSET); in xeon_setup_b2b_mw()
1448 iowrite64(0, mmio + XEON_SBAR23XLAT_OFFSET); in xeon_setup_b2b_mw()
1451 iowrite64(0, mmio + XEON_SBAR45XLAT_OFFSET); in xeon_setup_b2b_mw()
1458 iowrite64(0, mmio + XEON_PBAR23LMT_OFFSET); in xeon_setup_b2b_mw()
1460 iowrite64(0, mmio + XEON_PBAR45LMT_OFFSET); in xeon_setup_b2b_mw()
1468 iowrite64(bar_addr, mmio + XEON_PBAR23XLAT_OFFSET); in xeon_setup_b2b_mw()
1474 iowrite64(bar_addr, mmio + XEON_PBAR45XLAT_OFFSET); in xeon_setup_b2b_mw()