Lines Matching refs:digtable

433 	struct dig_t *digtable = &rtlpriv->dm_digtable;  in rtl92s_backoff_enable_flag()  local
436 if (falsealm_cnt->cnt_all > digtable->fa_highthresh) { in rtl92s_backoff_enable_flag()
437 if ((digtable->back_val - 6) < in rtl92s_backoff_enable_flag()
438 digtable->backoffval_range_min) in rtl92s_backoff_enable_flag()
439 digtable->back_val = digtable->backoffval_range_min; in rtl92s_backoff_enable_flag()
441 digtable->back_val -= 6; in rtl92s_backoff_enable_flag()
442 } else if (falsealm_cnt->cnt_all < digtable->fa_lowthresh) { in rtl92s_backoff_enable_flag()
443 if ((digtable->back_val + 6) > in rtl92s_backoff_enable_flag()
444 digtable->backoffval_range_max) in rtl92s_backoff_enable_flag()
445 digtable->back_val = in rtl92s_backoff_enable_flag()
446 digtable->backoffval_range_max; in rtl92s_backoff_enable_flag()
448 digtable->back_val += 6; in rtl92s_backoff_enable_flag()
455 struct dig_t *digtable = &rtlpriv->dm_digtable; in _rtl92s_dm_initial_gain_sta_beforeconnect() local
460 if ((digtable->pre_sta_cstate == digtable->cur_sta_cstate) || in _rtl92s_dm_initial_gain_sta_beforeconnect()
461 (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT)) { in _rtl92s_dm_initial_gain_sta_beforeconnect()
462 if (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT) { in _rtl92s_dm_initial_gain_sta_beforeconnect()
466 if (digtable->backoff_enable_flag) in _rtl92s_dm_initial_gain_sta_beforeconnect()
469 digtable->back_val = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_initial_gain_sta_beforeconnect()
471 if ((digtable->rssi_val + 10 - digtable->back_val) > in _rtl92s_dm_initial_gain_sta_beforeconnect()
472 digtable->rx_gain_max) in _rtl92s_dm_initial_gain_sta_beforeconnect()
473 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
474 digtable->rx_gain_max; in _rtl92s_dm_initial_gain_sta_beforeconnect()
475 else if ((digtable->rssi_val + 10 - digtable->back_val) in _rtl92s_dm_initial_gain_sta_beforeconnect()
476 < digtable->rx_gain_min) in _rtl92s_dm_initial_gain_sta_beforeconnect()
477 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
478 digtable->rx_gain_min; in _rtl92s_dm_initial_gain_sta_beforeconnect()
480 digtable->cur_igvalue = digtable->rssi_val + 10 in _rtl92s_dm_initial_gain_sta_beforeconnect()
481 - digtable->back_val; in _rtl92s_dm_initial_gain_sta_beforeconnect()
484 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
485 (digtable->cur_igvalue > 0x33) ? in _rtl92s_dm_initial_gain_sta_beforeconnect()
486 digtable->cur_igvalue : 0x33; in _rtl92s_dm_initial_gain_sta_beforeconnect()
489 digtable->cur_igvalue = in _rtl92s_dm_initial_gain_sta_beforeconnect()
490 digtable->rx_gain_max; in _rtl92s_dm_initial_gain_sta_beforeconnect()
500 digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; in _rtl92s_dm_initial_gain_sta_beforeconnect()
503 digtable->back_val = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_initial_gain_sta_beforeconnect()
504 digtable->cur_igvalue = rtlpriv->phy.default_initialgain[0]; in _rtl92s_dm_initial_gain_sta_beforeconnect()
505 digtable->pre_igvalue = 0; in _rtl92s_dm_initial_gain_sta_beforeconnect()
510 if (digtable->pre_igvalue != rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, in _rtl92s_dm_initial_gain_sta_beforeconnect()
514 if ((digtable->pre_igvalue != digtable->cur_igvalue) || in _rtl92s_dm_initial_gain_sta_beforeconnect()
519 initial_gain = (u8)digtable->cur_igvalue; in _rtl92s_dm_initial_gain_sta_beforeconnect()
524 digtable->pre_igvalue = digtable->cur_igvalue; in _rtl92s_dm_initial_gain_sta_beforeconnect()
566 struct dig_t *digtable = &rtlpriv->dm_digtable; in _rtl92s_dm_ctrl_initgain_byrssi() local
575 if (digtable->dig_enable_flag == false) in _rtl92s_dm_ctrl_initgain_byrssi()
652 struct dig_t *digtable = &rtlpriv->dm_digtable; in _rtl92s_dm_init_dig() local
655 digtable->dig_enable_flag = true; in _rtl92s_dm_init_dig()
656 digtable->backoff_enable_flag = true; in _rtl92s_dm_init_dig()
660 digtable->dig_algorithm = DIG_ALGO_BY_TOW_PORT; in _rtl92s_dm_init_dig()
662 digtable->dig_algorithm = in _rtl92s_dm_init_dig()
665 digtable->dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI; in _rtl92s_dm_init_dig()
666 digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; in _rtl92s_dm_init_dig()
668 digtable->dig_dbgmode = DM_DBG_OFF; in _rtl92s_dm_init_dig()
669 digtable->dig_slgorithm_switch = 0; in _rtl92s_dm_init_dig()
672 digtable->dig_state = DM_STA_DIG_MAX; in _rtl92s_dm_init_dig()
673 digtable->dig_highpwrstate = DM_STA_DIG_MAX; in _rtl92s_dm_init_dig()
675 digtable->cur_sta_cstate = DIG_STA_DISCONNECT; in _rtl92s_dm_init_dig()
676 digtable->pre_sta_cstate = DIG_STA_DISCONNECT; in _rtl92s_dm_init_dig()
677 digtable->cur_ap_cstate = DIG_AP_DISCONNECT; in _rtl92s_dm_init_dig()
678 digtable->pre_ap_cstate = DIG_AP_DISCONNECT; in _rtl92s_dm_init_dig()
680 digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; in _rtl92s_dm_init_dig()
681 digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; in _rtl92s_dm_init_dig()
683 digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; in _rtl92s_dm_init_dig()
684 digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; in _rtl92s_dm_init_dig()
686 digtable->rssi_highpower_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW; in _rtl92s_dm_init_dig()
687 digtable->rssi_highpower_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH; in _rtl92s_dm_init_dig()
690 digtable->rssi_val = 50; in _rtl92s_dm_init_dig()
691 digtable->back_val = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_init_dig()
692 digtable->rx_gain_max = DM_DIG_MAX; in _rtl92s_dm_init_dig()
694 digtable->rx_gain_min = DM_DIG_MIN; in _rtl92s_dm_init_dig()
696 digtable->backoffval_range_max = DM_DIG_BACKOFF_MAX; in _rtl92s_dm_init_dig()
697 digtable->backoffval_range_min = DM_DIG_BACKOFF_MIN; in _rtl92s_dm_init_dig()