379 	rtl8xxxu_write32(priv, REG_TX_AGC_A_CCK1_MCS32, val32);  in rtl8723b_set_tx_power()
384 	rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32);  in rtl8723b_set_tx_power()
390 	rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE18_06, ofdm);  in rtl8723b_set_tx_power()
391 	rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE54_24, ofdm);  in rtl8723b_set_tx_power()
400 	rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS03_MCS00, mcs);  in rtl8723b_set_tx_power()
401 	rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS07_MCS04, mcs);  in rtl8723b_set_tx_power()
499 	rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00);  in rtl8723bu_init_phy_bb()
535 	rtl8xxxu_write32(priv, REG_PAD_CTRL1, val32);  in rtl8723bu_phy_init_antenna_selection()
539 	rtl8xxxu_write32(priv, REG_GPIO_MUXCFG, val32);  in rtl8723bu_phy_init_antenna_selection()
543 	rtl8xxxu_write32(priv, REG_GPIO_MUXCFG, val32);  in rtl8723bu_phy_init_antenna_selection()
547 	rtl8xxxu_write32(priv, REG_LEDCFG0, val32);  in rtl8723bu_phy_init_antenna_selection()
551 	rtl8xxxu_write32(priv, REG_LEDCFG0, val32);  in rtl8723bu_phy_init_antenna_selection()
555 	rtl8xxxu_write32(priv, REG_RFE_BUFFER, val32);  in rtl8723bu_phy_init_antenna_selection()
560 	rtl8xxxu_write32(priv, REG_RFE_CTRL_ANTA_SRC, val32);  in rtl8723bu_phy_init_antenna_selection()
564 	rtl8xxxu_write32(priv, REG_PWR_DATA, val32);  in rtl8723bu_phy_init_antenna_selection()
579 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
594 	rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8723bu_iqk_path_a()
595 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8723bu_iqk_path_a()
598 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c);  in rtl8723bu_iqk_path_a()
599 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8723bu_iqk_path_a()
600 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtl8723bu_iqk_path_a()
601 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8723bu_iqk_path_a()
603 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x821403ea);  in rtl8723bu_iqk_path_a()
604 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28110000);  in rtl8723bu_iqk_path_a()
605 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82110000);  in rtl8723bu_iqk_path_a()
606 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x28110000);  in rtl8723bu_iqk_path_a()
609 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x00462911);  in rtl8723bu_iqk_path_a()
617 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
624 		rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000);  in rtl8723bu_iqk_path_a()
626 		rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280);  in rtl8723bu_iqk_path_a()
632 	rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00000800);  in rtl8723bu_iqk_path_a()
635 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);  in rtl8723bu_iqk_path_a()
636 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8723bu_iqk_path_a()
641 	rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel);  in rtl8723bu_iqk_path_a()
644 	rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00001800);  in rtl8723bu_iqk_path_a()
652 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_iqk_path_a()
689 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
704 	rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00);  in rtl8723bu_rx_iqk_path_a()
705 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8723bu_rx_iqk_path_a()
708 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x18008c1c);  in rtl8723bu_rx_iqk_path_a()
709 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x38008c1c);  in rtl8723bu_rx_iqk_path_a()
710 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtl8723bu_rx_iqk_path_a()
711 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8723bu_rx_iqk_path_a()
713 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82160ff0);  in rtl8723bu_rx_iqk_path_a()
714 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x28110000);  in rtl8723bu_rx_iqk_path_a()
715 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82110000);  in rtl8723bu_rx_iqk_path_a()
716 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x28110000);  in rtl8723bu_rx_iqk_path_a()
719 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a911);  in rtl8723bu_rx_iqk_path_a()
727 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
734 		rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000);  in rtl8723bu_rx_iqk_path_a()
736 		rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280);  in rtl8723bu_rx_iqk_path_a()
742 	rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00000800);  in rtl8723bu_rx_iqk_path_a()
745 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);  in rtl8723bu_rx_iqk_path_a()
746 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8723bu_rx_iqk_path_a()
751 	rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel);  in rtl8723bu_rx_iqk_path_a()
754 	rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00001800);  in rtl8723bu_rx_iqk_path_a()
762 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
785 	rtl8xxxu_write32(priv, REG_TX_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
792 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
809 	rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800);  in rtl8723bu_rx_iqk_path_a()
812 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x38008c1c);  in rtl8723bu_rx_iqk_path_a()
813 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x18008c1c);  in rtl8723bu_rx_iqk_path_a()
814 	rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x38008c1c);  in rtl8723bu_rx_iqk_path_a()
815 	rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x38008c1c);  in rtl8723bu_rx_iqk_path_a()
817 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82110000);  in rtl8723bu_rx_iqk_path_a()
818 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, 0x2816001f);  in rtl8723bu_rx_iqk_path_a()
819 	rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82110000);  in rtl8723bu_rx_iqk_path_a()
820 	rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x28110000);  in rtl8723bu_rx_iqk_path_a()
823 	rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x0046a8d1);  in rtl8723bu_rx_iqk_path_a()
831 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
834 		rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000000);  in rtl8723bu_rx_iqk_path_a()
836 		rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00000280);  in rtl8723bu_rx_iqk_path_a()
841 	rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00000800);  in rtl8723bu_rx_iqk_path_a()
844 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000);  in rtl8723bu_rx_iqk_path_a()
845 	rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000);  in rtl8723bu_rx_iqk_path_a()
850 	rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, path_sel);  in rtl8723bu_rx_iqk_path_a()
853 	rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, 0x00001800);  in rtl8723bu_rx_iqk_path_a()
861 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_rx_iqk_path_a()
937 	rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);  in rtl8723bu_phy_iqcalibrate()
939 	rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600);  in rtl8723bu_phy_iqcalibrate()
940 	rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4);  in rtl8723bu_phy_iqcalibrate()
941 	rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x22204000);  in rtl8723bu_phy_iqcalibrate()
949 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
970 			rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1013 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1019 		rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1059 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_phy_iqcalibrate()
1076 		rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | 0x50);  in rtl8723bu_phy_iqcalibrate()
1077 		rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, val32 | xa_agc);  in rtl8723bu_phy_iqcalibrate()
1082 			rtl8xxxu_write32(priv, REG_OFDM0_XB_AGC_CORE1,  in rtl8723bu_phy_iqcalibrate()
1084 			rtl8xxxu_write32(priv, REG_OFDM0_XB_AGC_CORE1,  in rtl8723bu_phy_iqcalibrate()
1089 		rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00);  in rtl8723bu_phy_iqcalibrate()
1090 		rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00);  in rtl8723bu_phy_iqcalibrate()
1199 	rtl8xxxu_write32(priv, REG_BT_CONTROL_8723BU, bt_control);  in rtl8723bu_phy_iq_calibrate()
1236 	rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);  in rtl8723bu_active_to_emu()
1302 	rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);  in rtl8723b_emu_to_active()
1323 	rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);  in rtl8723b_emu_to_active()
1328 	rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);  in rtl8723b_emu_to_active()
1333 	rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);  in rtl8723b_emu_to_active()
1338 	rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);  in rtl8723b_emu_to_active()
1434 	rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00);  in rtl8723bu_power_on()
1444 	rtl8xxxu_write32(priv, REG_LEDCFG0, val32);  in rtl8723bu_power_on()
1503 	rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, val32);  in rtl8723b_enable_rf()
1547 	rtl8xxxu_write32(priv, REG_PWR_DATA, val32);  in rtl8723b_enable_rf()
1556 	rtl8xxxu_write32(priv, REG_RFE_BUFFER, val32);  in rtl8723b_enable_rf()
1563 	rtl8xxxu_write32(priv, REG_LEDCFG0, val32);  in rtl8723b_enable_rf()
1581 	rtl8xxxu_write32(priv, REG_S0S1_PATH_SWITCH, 0x00);  in rtl8723b_enable_rf()
1590 	rtl8xxxu_write32(priv, REG_BT_COEX_TABLE1, 0x55555555);  in rtl8723b_enable_rf()
1591 	rtl8xxxu_write32(priv, REG_BT_COEX_TABLE2, 0x55555555);  in rtl8723b_enable_rf()
1592 	rtl8xxxu_write32(priv, REG_BT_COEX_TABLE3, 0x00ffffff);  in rtl8723b_enable_rf()
1622 	rtl8xxxu_write32(priv, REG_RXDMA_AGG_PG_TH, agg_rx);  in rtl8723bu_init_aggregation()
1632 	rtl8xxxu_write32(priv, REG_NHM_TH3_TO_TH0_8723B, 0xffffff52);  in rtl8723bu_init_statistics()
1633 	rtl8xxxu_write32(priv, REG_NHM_TH7_TO_TH4_8723B, 0xffffffff);  in rtl8723bu_init_statistics()
1637 	rtl8xxxu_write32(priv, REG_FPGA0_IQK, val32);  in rtl8723bu_init_statistics()
1641 	rtl8xxxu_write32(priv, REG_NHM_TH9_TH10_8723B, val32);  in rtl8723bu_init_statistics()
1645 	rtl8xxxu_write32(priv, REG_OFDM0_FA_RSTC, val32);  in rtl8723bu_init_statistics()