376 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);  in rtl8723b_set_tx_power()
381 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);  in rtl8723b_set_tx_power()
533 	val32 = rtl8xxxu_read32(priv, REG_PAD_CTRL1);  in rtl8723bu_phy_init_antenna_selection()
537 	val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);  in rtl8723bu_phy_init_antenna_selection()
541 	val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);  in rtl8723bu_phy_init_antenna_selection()
545 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_phy_init_antenna_selection()
549 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_phy_init_antenna_selection()
553 	val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);  in rtl8723bu_phy_init_antenna_selection()
557 	val32 = rtl8xxxu_read32(priv, REG_RFE_CTRL_ANTA_SRC);  in rtl8723bu_phy_init_antenna_selection()
562 	val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);  in rtl8723bu_phy_init_antenna_selection()
572 	path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8723bu_iqk_path_a()
577 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
614 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
650 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
655 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_iqk_path_a()
656 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8723bu_iqk_path_a()
657 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8723bu_iqk_path_a()
682 	path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8723bu_rx_iqk_path_a()
687 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
724 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
760 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
765 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
766 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8723bu_rx_iqk_path_a()
767 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8723bu_rx_iqk_path_a()
790 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
828 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
859 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
864 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
865 	reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
913 	u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff;  in rtl8723bu_phy_iqcalibrate()
914 	u8 xb_agc = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1) & 0xff;  in rtl8723bu_phy_iqcalibrate()
935 	val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);  in rtl8723bu_phy_iqcalibrate()
947 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
968 			val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
972 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
975 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
989 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
992 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1011 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1016 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1027 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B);  in rtl8723bu_phy_iqcalibrate()
1029 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B);  in rtl8723bu_phy_iqcalibrate()
1041 				val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1044 				val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1057 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1074 		val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);  in rtl8723bu_phy_iqcalibrate()
1080 			val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1);  in rtl8723bu_phy_iqcalibrate()
1114 	bt_control = rtl8xxxu_read32(priv, REG_BT_CONTROL_8723BU);  in rtl8723bu_phy_iq_calibrate()
1234 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723bu_active_to_emu()
1306 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1321 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1326 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1331 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1336 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1341 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1442 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_power_on()
1501 	val32 = rtl8xxxu_read32(priv, REG_RX_WAIT_CCA);  in rtl8723b_enable_rf()
1545 	val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);  in rtl8723b_enable_rf()
1554 	val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);  in rtl8723b_enable_rf()
1560 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723b_enable_rf()
1617 	agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH);  in rtl8723bu_init_aggregation()
1635 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_init_statistics()
1639 	val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B);  in rtl8723bu_init_statistics()
1643 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC);  in rtl8723bu_init_statistics()