170 static void rt2800mmio_wakeup(struct rt2x00_dev *rt2x00dev)  in rt2800mmio_wakeup()  argument
175 	rt2800_config(rt2x00dev, &libconf, IEEE80211_CONF_CHANGE_PS);  in rt2800mmio_wakeup()
259 static bool rt2800mmio_txdone(struct rt2x00_dev *rt2x00dev)  in rt2800mmio_txdone()  argument
266 	while (kfifo_get(&rt2x00dev->txstatus_fifo, &status)) {  in rt2800mmio_txdone()
273 			rt2x00_warn(rt2x00dev, "Got TX status report with unexpected pid %u, dropping\n",  in rt2800mmio_txdone()
278 		queue = rt2x00queue_get_tx_queue(rt2x00dev, qid);  in rt2800mmio_txdone()
284 			rt2x00_warn(rt2x00dev, "Got TX status for an unavailable queue %u, dropping\n",  in rt2800mmio_txdone()
294 			rt2x00_warn(rt2x00dev, "Got TX status for an empty queue %u, dropping\n",  in rt2800mmio_txdone()
313 				rt2x00_warn(rt2x00dev, "No frame found for TX status on queue %u, dropping\n",  in rt2800mmio_txdone()
333 static inline void rt2800mmio_enable_interrupt(struct rt2x00_dev *rt2x00dev,  in rt2800mmio_enable_interrupt()  argument
342 	spin_lock_irq(&rt2x00dev->irqmask_lock);  in rt2800mmio_enable_interrupt()
343 	reg = rt2x00mmio_register_read(rt2x00dev, INT_MASK_CSR);  in rt2800mmio_enable_interrupt()
345 	rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg);  in rt2800mmio_enable_interrupt()
346 	spin_unlock_irq(&rt2x00dev->irqmask_lock);  in rt2800mmio_enable_interrupt()
351 	struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;  in rt2800mmio_txstatus_tasklet()  local
352 	if (rt2800mmio_txdone(rt2x00dev))  in rt2800mmio_txstatus_tasklet()
353 		tasklet_schedule(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_txstatus_tasklet()
365 	struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;  in rt2800mmio_pretbtt_tasklet()  local
366 	rt2x00lib_pretbtt(rt2x00dev);  in rt2800mmio_pretbtt_tasklet()
367 	if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_pretbtt_tasklet()
368 		rt2800mmio_enable_interrupt(rt2x00dev, INT_MASK_CSR_PRE_TBTT);  in rt2800mmio_pretbtt_tasklet()
374 	struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;  in rt2800mmio_tbtt_tasklet()  local
375 	struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;  in rt2800mmio_tbtt_tasklet()
378 	rt2x00lib_beacondone(rt2x00dev);  in rt2800mmio_tbtt_tasklet()
380 	if (rt2x00dev->intf_ap_count) {  in rt2800mmio_tbtt_tasklet()
388 			reg = rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG);  in rt2800mmio_tbtt_tasklet()
390 					   (rt2x00dev->beacon_int * 16) - 1);  in rt2800mmio_tbtt_tasklet()
391 			rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_tbtt_tasklet()
393 			reg = rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG);  in rt2800mmio_tbtt_tasklet()
395 					   (rt2x00dev->beacon_int * 16));  in rt2800mmio_tbtt_tasklet()
396 			rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_tbtt_tasklet()
402 	if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_tbtt_tasklet()
403 		rt2800mmio_enable_interrupt(rt2x00dev, INT_MASK_CSR_TBTT);  in rt2800mmio_tbtt_tasklet()
409 	struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;  in rt2800mmio_rxdone_tasklet()  local
410 	if (rt2x00mmio_rxdone(rt2x00dev))  in rt2800mmio_rxdone_tasklet()
411 		tasklet_schedule(&rt2x00dev->rxdone_tasklet);  in rt2800mmio_rxdone_tasklet()
412 	else if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_rxdone_tasklet()
413 		rt2800mmio_enable_interrupt(rt2x00dev, INT_MASK_CSR_RX_DONE);  in rt2800mmio_rxdone_tasklet()
419 	struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;  in rt2800mmio_autowake_tasklet()  local
420 	rt2800mmio_wakeup(rt2x00dev);  in rt2800mmio_autowake_tasklet()
421 	if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_autowake_tasklet()
422 		rt2800mmio_enable_interrupt(rt2x00dev,  in rt2800mmio_autowake_tasklet()
427 static void rt2800mmio_txstatus_interrupt(struct rt2x00_dev *rt2x00dev)  in rt2800mmio_txstatus_interrupt()  argument
450 	for (i = 0; i < rt2x00dev->tx->limit; i++) {  in rt2800mmio_txstatus_interrupt()
451 		status = rt2x00mmio_register_read(rt2x00dev, TX_STA_FIFO);  in rt2800mmio_txstatus_interrupt()
456 		if (!kfifo_put(&rt2x00dev->txstatus_fifo, status)) {  in rt2800mmio_txstatus_interrupt()
457 			rt2x00_warn(rt2x00dev, "TX status FIFO overrun, drop tx status report\n");  in rt2800mmio_txstatus_interrupt()
463 	tasklet_schedule(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_txstatus_interrupt()
468 	struct rt2x00_dev *rt2x00dev = dev_instance;  in rt2800mmio_interrupt()  local
472 	reg = rt2x00mmio_register_read(rt2x00dev, INT_SOURCE_CSR);  in rt2800mmio_interrupt()
473 	rt2x00mmio_register_write(rt2x00dev, INT_SOURCE_CSR, reg);  in rt2800mmio_interrupt()
478 	if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_interrupt()
489 		rt2800mmio_txstatus_interrupt(rt2x00dev);  in rt2800mmio_interrupt()
497 		tasklet_hi_schedule(&rt2x00dev->pretbtt_tasklet);  in rt2800mmio_interrupt()
500 		tasklet_hi_schedule(&rt2x00dev->tbtt_tasklet);  in rt2800mmio_interrupt()
503 		tasklet_schedule(&rt2x00dev->rxdone_tasklet);  in rt2800mmio_interrupt()
506 		tasklet_schedule(&rt2x00dev->autowake_tasklet);  in rt2800mmio_interrupt()
512 	spin_lock(&rt2x00dev->irqmask_lock);  in rt2800mmio_interrupt()
513 	reg = rt2x00mmio_register_read(rt2x00dev, INT_MASK_CSR);  in rt2800mmio_interrupt()
515 	rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg);  in rt2800mmio_interrupt()
516 	spin_unlock(&rt2x00dev->irqmask_lock);  in rt2800mmio_interrupt()
522 void rt2800mmio_toggle_irq(struct rt2x00_dev *rt2x00dev,  in rt2800mmio_toggle_irq()  argument
533 		reg = rt2x00mmio_register_read(rt2x00dev, INT_SOURCE_CSR);  in rt2800mmio_toggle_irq()
534 		rt2x00mmio_register_write(rt2x00dev, INT_SOURCE_CSR, reg);  in rt2800mmio_toggle_irq()
537 	spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);  in rt2800mmio_toggle_irq()
546 	rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg);  in rt2800mmio_toggle_irq()
547 	spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);  in rt2800mmio_toggle_irq()
553 		tasklet_kill(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_toggle_irq()
554 		tasklet_kill(&rt2x00dev->rxdone_tasklet);  in rt2800mmio_toggle_irq()
555 		tasklet_kill(&rt2x00dev->autowake_tasklet);  in rt2800mmio_toggle_irq()
556 		tasklet_kill(&rt2x00dev->tbtt_tasklet);  in rt2800mmio_toggle_irq()
557 		tasklet_kill(&rt2x00dev->pretbtt_tasklet);  in rt2800mmio_toggle_irq()
567 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_start_queue()  local
572 		reg = rt2x00mmio_register_read(rt2x00dev, MAC_SYS_CTRL);  in rt2800mmio_start_queue()
574 		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);  in rt2800mmio_start_queue()
577 		reg = rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG);  in rt2800mmio_start_queue()
581 		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_start_queue()
583 		reg = rt2x00mmio_register_read(rt2x00dev, INT_TIMER_EN);  in rt2800mmio_start_queue()
585 		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);  in rt2800mmio_start_queue()
595 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_kick_queue()  local
605 		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),  in rt2800mmio_kick_queue()
610 		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(5),  in rt2800mmio_kick_queue()
621 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_stop_queue()  local
626 		reg = rt2x00mmio_register_read(rt2x00dev, MAC_SYS_CTRL);  in rt2800mmio_stop_queue()
628 		rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);  in rt2800mmio_stop_queue()
631 		reg = rt2x00mmio_register_read(rt2x00dev, BCN_TIME_CFG);  in rt2800mmio_stop_queue()
635 		rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg);  in rt2800mmio_stop_queue()
637 		reg = rt2x00mmio_register_read(rt2x00dev, INT_TIMER_EN);  in rt2800mmio_stop_queue()
639 		rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg);  in rt2800mmio_stop_queue()
646 		tasklet_kill(&rt2x00dev->tbtt_tasklet);  in rt2800mmio_stop_queue()
647 		tasklet_kill(&rt2x00dev->pretbtt_tasklet);  in rt2800mmio_stop_queue()
658 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_queue_init()  local
661 	rt2800_get_txwi_rxwi_size(rt2x00dev, &txwi_size, &rxwi_size);  in rt2800mmio_queue_init()
724 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt2800mmio_clear_entry()  local
740 		rt2x00mmio_register_write(rt2x00dev, RX_CRX_IDX,  in rt2800mmio_clear_entry()
750 int rt2800mmio_init_queues(struct rt2x00_dev *rt2x00dev)  in rt2800mmio_init_queues()  argument
757 	entry_priv = rt2x00dev->tx[0].entries[0].priv_data;  in rt2800mmio_init_queues()
758 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,  in rt2800mmio_init_queues()
760 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,  in rt2800mmio_init_queues()
761 				  rt2x00dev->tx[0].limit);  in rt2800mmio_init_queues()
762 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);  in rt2800mmio_init_queues()
763 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);  in rt2800mmio_init_queues()
765 	entry_priv = rt2x00dev->tx[1].entries[0].priv_data;  in rt2800mmio_init_queues()
766 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,  in rt2800mmio_init_queues()
768 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,  in rt2800mmio_init_queues()
769 				  rt2x00dev->tx[1].limit);  in rt2800mmio_init_queues()
770 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);  in rt2800mmio_init_queues()
771 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);  in rt2800mmio_init_queues()
773 	entry_priv = rt2x00dev->tx[2].entries[0].priv_data;  in rt2800mmio_init_queues()
774 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,  in rt2800mmio_init_queues()
776 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,  in rt2800mmio_init_queues()
777 				  rt2x00dev->tx[2].limit);  in rt2800mmio_init_queues()
778 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);  in rt2800mmio_init_queues()
779 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);  in rt2800mmio_init_queues()
781 	entry_priv = rt2x00dev->tx[3].entries[0].priv_data;  in rt2800mmio_init_queues()
782 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,  in rt2800mmio_init_queues()
784 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,  in rt2800mmio_init_queues()
785 				  rt2x00dev->tx[3].limit);  in rt2800mmio_init_queues()
786 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);  in rt2800mmio_init_queues()
787 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);  in rt2800mmio_init_queues()
789 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR4, 0);  in rt2800mmio_init_queues()
790 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT4, 0);  in rt2800mmio_init_queues()
791 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX4, 0);  in rt2800mmio_init_queues()
792 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX4, 0);  in rt2800mmio_init_queues()
794 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR5, 0);  in rt2800mmio_init_queues()
795 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT5, 0);  in rt2800mmio_init_queues()
796 	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX5, 0);  in rt2800mmio_init_queues()
797 	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX5, 0);  in rt2800mmio_init_queues()
799 	entry_priv = rt2x00dev->rx->entries[0].priv_data;  in rt2800mmio_init_queues()
800 	rt2x00mmio_register_write(rt2x00dev, RX_BASE_PTR,  in rt2800mmio_init_queues()
802 	rt2x00mmio_register_write(rt2x00dev, RX_MAX_CNT,  in rt2800mmio_init_queues()
803 				  rt2x00dev->rx[0].limit);  in rt2800mmio_init_queues()
804 	rt2x00mmio_register_write(rt2x00dev, RX_CRX_IDX,  in rt2800mmio_init_queues()
805 				  rt2x00dev->rx[0].limit - 1);  in rt2800mmio_init_queues()
806 	rt2x00mmio_register_write(rt2x00dev, RX_DRX_IDX, 0);  in rt2800mmio_init_queues()
808 	rt2800_disable_wpdma(rt2x00dev);  in rt2800mmio_init_queues()
810 	rt2x00mmio_register_write(rt2x00dev, DELAY_INT_CFG, 0);  in rt2800mmio_init_queues()
816 int rt2800mmio_init_registers(struct rt2x00_dev *rt2x00dev)  in rt2800mmio_init_registers()  argument
823 	reg = rt2x00mmio_register_read(rt2x00dev, WPDMA_RST_IDX);  in rt2800mmio_init_registers()
831 	rt2x00mmio_register_write(rt2x00dev, WPDMA_RST_IDX, reg);  in rt2800mmio_init_registers()
833 	rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);  in rt2800mmio_init_registers()
834 	rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);  in rt2800mmio_init_registers()
836 	if (rt2x00_is_pcie(rt2x00dev) &&  in rt2800mmio_init_registers()
837 	    (rt2x00_rt(rt2x00dev, RT3090) ||  in rt2800mmio_init_registers()
838 	     rt2x00_rt(rt2x00dev, RT3390) ||  in rt2800mmio_init_registers()
839 	     rt2x00_rt(rt2x00dev, RT3572) ||  in rt2800mmio_init_registers()
840 	     rt2x00_rt(rt2x00dev, RT3593) ||  in rt2800mmio_init_registers()
841 	     rt2x00_rt(rt2x00dev, RT5390) ||  in rt2800mmio_init_registers()
842 	     rt2x00_rt(rt2x00dev, RT5392) ||  in rt2800mmio_init_registers()
843 	     rt2x00_rt(rt2x00dev, RT5592))) {  in rt2800mmio_init_registers()
844 		reg = rt2x00mmio_register_read(rt2x00dev, AUX_CTRL);  in rt2800mmio_init_registers()
847 		rt2x00mmio_register_write(rt2x00dev, AUX_CTRL, reg);  in rt2800mmio_init_registers()
850 	rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);  in rt2800mmio_init_registers()
855 	rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg);  in rt2800mmio_init_registers()
857 	rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);  in rt2800mmio_init_registers()
866 int rt2800mmio_enable_radio(struct rt2x00_dev *rt2x00dev)  in rt2800mmio_enable_radio()  argument
869 	rt2800_wait_wpdma_ready(rt2x00dev);  in rt2800mmio_enable_radio()
871 	if (unlikely(rt2800mmio_init_queues(rt2x00dev)))  in rt2800mmio_enable_radio()
874 	return rt2800_enable_radio(rt2x00dev);  in rt2800mmio_enable_radio()