Lines Matching refs:rt2x00dev
56 static void rt2500pci_bbp_write(struct rt2x00_dev *rt2x00dev, in rt2500pci_bbp_write() argument
61 mutex_lock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_write()
67 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2500pci_bbp_write()
74 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_write()
77 mutex_unlock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_write()
80 static u8 rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev, in rt2500pci_bbp_read() argument
86 mutex_lock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_read()
96 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2500pci_bbp_read()
102 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_read()
104 WAIT_FOR_BBP(rt2x00dev, ®); in rt2500pci_bbp_read()
109 mutex_unlock(&rt2x00dev->csr_mutex); in rt2500pci_bbp_read()
114 static void rt2500pci_rf_write(struct rt2x00_dev *rt2x00dev, in rt2500pci_rf_write() argument
119 mutex_lock(&rt2x00dev->csr_mutex); in rt2500pci_rf_write()
125 if (WAIT_FOR_RF(rt2x00dev, ®)) { in rt2500pci_rf_write()
132 rt2x00mmio_register_write(rt2x00dev, RFCSR, reg); in rt2500pci_rf_write()
133 rt2x00_rf_write(rt2x00dev, word, value); in rt2500pci_rf_write()
136 mutex_unlock(&rt2x00dev->csr_mutex); in rt2500pci_rf_write()
141 struct rt2x00_dev *rt2x00dev = eeprom->data; in rt2500pci_eepromregister_read() local
144 reg = rt2x00mmio_register_read(rt2x00dev, CSR21); in rt2500pci_eepromregister_read()
156 struct rt2x00_dev *rt2x00dev = eeprom->data; in rt2500pci_eepromregister_write() local
166 rt2x00mmio_register_write(rt2x00dev, CSR21, reg); in rt2500pci_eepromregister_write()
204 static int rt2500pci_rfkill_poll(struct rt2x00_dev *rt2x00dev) in rt2500pci_rfkill_poll() argument
208 reg = rt2x00mmio_register_read(rt2x00dev, GPIOCSR); in rt2500pci_rfkill_poll()
221 reg = rt2x00mmio_register_read(led->rt2x00dev, LEDCSR); in rt2500pci_brightness_set()
228 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_brightness_set()
239 reg = rt2x00mmio_register_read(led->rt2x00dev, LEDCSR); in rt2500pci_blink_set()
242 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_blink_set()
247 static void rt2500pci_init_led(struct rt2x00_dev *rt2x00dev, in rt2500pci_init_led() argument
251 led->rt2x00dev = rt2x00dev; in rt2500pci_init_led()
262 static void rt2500pci_config_filter(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_filter() argument
273 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR0); in rt2500pci_config_filter()
281 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags)); in rt2500pci_config_filter()
283 !test_bit(CONFIG_MONITORING, &rt2x00dev->flags) && in rt2500pci_config_filter()
284 !rt2x00dev->intf_ap_count); in rt2500pci_config_filter()
289 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_config_filter()
292 static void rt2500pci_config_intf(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_intf() argument
297 struct data_queue *queue = rt2x00dev->bcn; in rt2500pci_config_intf()
306 reg = rt2x00mmio_register_read(rt2x00dev, BCNCSR1); in rt2500pci_config_intf()
309 rt2x00mmio_register_write(rt2x00dev, BCNCSR1, reg); in rt2500pci_config_intf()
314 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_config_intf()
316 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_config_intf()
320 rt2x00mmio_register_multiwrite(rt2x00dev, CSR3, in rt2500pci_config_intf()
324 rt2x00mmio_register_multiwrite(rt2x00dev, CSR5, in rt2500pci_config_intf()
328 static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_erp() argument
341 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR1); in rt2500pci_config_erp()
346 rt2x00mmio_register_write(rt2x00dev, TXCSR1, reg); in rt2500pci_config_erp()
348 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR2); in rt2500pci_config_erp()
353 rt2x00mmio_register_write(rt2x00dev, ARCSR2, reg); in rt2500pci_config_erp()
355 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR3); in rt2500pci_config_erp()
360 rt2x00mmio_register_write(rt2x00dev, ARCSR3, reg); in rt2500pci_config_erp()
362 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR4); in rt2500pci_config_erp()
367 rt2x00mmio_register_write(rt2x00dev, ARCSR4, reg); in rt2500pci_config_erp()
369 reg = rt2x00mmio_register_read(rt2x00dev, ARCSR5); in rt2500pci_config_erp()
374 rt2x00mmio_register_write(rt2x00dev, ARCSR5, reg); in rt2500pci_config_erp()
378 rt2x00mmio_register_write(rt2x00dev, ARCSR1, erp->basic_rates); in rt2500pci_config_erp()
381 reg = rt2x00mmio_register_read(rt2x00dev, CSR11); in rt2500pci_config_erp()
383 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_config_erp()
385 reg = rt2x00mmio_register_read(rt2x00dev, CSR18); in rt2500pci_config_erp()
388 rt2x00mmio_register_write(rt2x00dev, CSR18, reg); in rt2500pci_config_erp()
390 reg = rt2x00mmio_register_read(rt2x00dev, CSR19); in rt2500pci_config_erp()
393 rt2x00mmio_register_write(rt2x00dev, CSR19, reg); in rt2500pci_config_erp()
397 reg = rt2x00mmio_register_read(rt2x00dev, CSR12); in rt2500pci_config_erp()
402 rt2x00mmio_register_write(rt2x00dev, CSR12, reg); in rt2500pci_config_erp()
407 static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_ant() argument
421 reg = rt2x00mmio_register_read(rt2x00dev, BBPCSR1); in rt2500pci_config_ant()
422 r14 = rt2500pci_bbp_read(rt2x00dev, 14); in rt2500pci_config_ant()
423 r2 = rt2500pci_bbp_read(rt2x00dev, 2); in rt2500pci_config_ant()
458 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) { in rt2500pci_config_ant()
466 if (rt2x00_rf(rt2x00dev, RF2525E)) in rt2500pci_config_ant()
473 rt2x00mmio_register_write(rt2x00dev, BBPCSR1, reg); in rt2500pci_config_ant()
474 rt2500pci_bbp_write(rt2x00dev, 14, r14); in rt2500pci_config_ant()
475 rt2500pci_bbp_write(rt2x00dev, 2, r2); in rt2500pci_config_ant()
478 static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_channel() argument
492 if (!rt2x00_rf(rt2x00dev, RF2523)) in rt2500pci_config_channel()
499 if (rt2x00_rf(rt2x00dev, RF2525)) { in rt2500pci_config_channel()
507 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1); in rt2500pci_config_channel()
508 rt2500pci_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); in rt2500pci_config_channel()
509 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3); in rt2500pci_config_channel()
511 rt2500pci_rf_write(rt2x00dev, 4, rf->rf4); in rt2500pci_config_channel()
514 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1); in rt2500pci_config_channel()
515 rt2500pci_rf_write(rt2x00dev, 2, rf->rf2); in rt2500pci_config_channel()
516 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3); in rt2500pci_config_channel()
518 rt2500pci_rf_write(rt2x00dev, 4, rf->rf4); in rt2500pci_config_channel()
525 rt2500pci_bbp_write(rt2x00dev, 70, r70); in rt2500pci_config_channel()
533 if (!rt2x00_rf(rt2x00dev, RF2523)) { in rt2500pci_config_channel()
535 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1); in rt2500pci_config_channel()
539 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3); in rt2500pci_config_channel()
544 rf->rf1 = rt2x00mmio_register_read(rt2x00dev, CNT0); in rt2500pci_config_channel()
547 static void rt2500pci_config_txpower(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_txpower() argument
552 rf3 = rt2x00_rf_read(rt2x00dev, 3); in rt2500pci_config_txpower()
554 rt2500pci_rf_write(rt2x00dev, 3, rf3); in rt2500pci_config_txpower()
557 static void rt2500pci_config_retry_limit(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_retry_limit() argument
562 reg = rt2x00mmio_register_read(rt2x00dev, CSR11); in rt2500pci_config_retry_limit()
567 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_config_retry_limit()
570 static void rt2500pci_config_ps(struct rt2x00_dev *rt2x00dev, in rt2500pci_config_ps() argument
579 reg = rt2x00mmio_register_read(rt2x00dev, CSR20); in rt2500pci_config_ps()
581 (rt2x00dev->beacon_int - 20) * 16); in rt2500pci_config_ps()
587 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
590 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
592 reg = rt2x00mmio_register_read(rt2x00dev, CSR20); in rt2500pci_config_ps()
594 rt2x00mmio_register_write(rt2x00dev, CSR20, reg); in rt2500pci_config_ps()
597 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); in rt2500pci_config_ps()
600 static void rt2500pci_config(struct rt2x00_dev *rt2x00dev, in rt2500pci_config() argument
605 rt2500pci_config_channel(rt2x00dev, &libconf->rf, in rt2500pci_config()
609 rt2500pci_config_txpower(rt2x00dev, in rt2500pci_config()
612 rt2500pci_config_retry_limit(rt2x00dev, libconf); in rt2500pci_config()
614 rt2500pci_config_ps(rt2x00dev, libconf); in rt2500pci_config()
620 static void rt2500pci_link_stats(struct rt2x00_dev *rt2x00dev, in rt2500pci_link_stats() argument
628 reg = rt2x00mmio_register_read(rt2x00dev, CNT0); in rt2500pci_link_stats()
634 reg = rt2x00mmio_register_read(rt2x00dev, CNT3); in rt2500pci_link_stats()
638 static inline void rt2500pci_set_vgc(struct rt2x00_dev *rt2x00dev, in rt2500pci_set_vgc() argument
642 rt2500pci_bbp_write(rt2x00dev, 17, vgc_level); in rt2500pci_set_vgc()
648 static void rt2500pci_reset_tuner(struct rt2x00_dev *rt2x00dev, in rt2500pci_reset_tuner() argument
651 rt2500pci_set_vgc(rt2x00dev, qual, 0x48); in rt2500pci_reset_tuner()
654 static void rt2500pci_link_tuner(struct rt2x00_dev *rt2x00dev, in rt2500pci_link_tuner() argument
662 if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D && in rt2500pci_link_tuner()
663 rt2x00dev->intf_associated && count > 20) in rt2500pci_link_tuner()
672 if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D || in rt2500pci_link_tuner()
673 !rt2x00dev->intf_associated) in rt2500pci_link_tuner()
683 rt2500pci_set_vgc(rt2x00dev, qual, qual->vgc_level); in rt2500pci_link_tuner()
691 rt2500pci_set_vgc(rt2x00dev, qual, 0x50); in rt2500pci_link_tuner()
699 rt2500pci_set_vgc(rt2x00dev, qual, 0x41); in rt2500pci_link_tuner()
708 rt2500pci_set_vgc(rt2x00dev, qual, qual->vgc_level); in rt2500pci_link_tuner()
719 rt2500pci_set_vgc(rt2x00dev, qual, ++qual->vgc_level_reg); in rt2500pci_link_tuner()
721 rt2500pci_set_vgc(rt2x00dev, qual, --qual->vgc_level_reg); in rt2500pci_link_tuner()
729 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; in rt2500pci_start_queue() local
734 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR0); in rt2500pci_start_queue()
736 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_start_queue()
739 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_start_queue()
743 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_start_queue()
752 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; in rt2500pci_kick_queue() local
757 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_kick_queue()
759 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
762 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_kick_queue()
764 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
767 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_kick_queue()
769 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_kick_queue()
778 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; in rt2500pci_stop_queue() local
785 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR0); in rt2500pci_stop_queue()
787 rt2x00mmio_register_write(rt2x00dev, TXCSR0, reg); in rt2500pci_stop_queue()
790 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR0); in rt2500pci_stop_queue()
792 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_stop_queue()
795 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_stop_queue()
799 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_stop_queue()
804 tasklet_kill(&rt2x00dev->tbtt_tasklet); in rt2500pci_stop_queue()
853 static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_queues() argument
861 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR2); in rt2500pci_init_queues()
862 rt2x00_set_field32(®, TXCSR2_TXD_SIZE, rt2x00dev->tx[0].desc_size); in rt2500pci_init_queues()
863 rt2x00_set_field32(®, TXCSR2_NUM_TXD, rt2x00dev->tx[1].limit); in rt2500pci_init_queues()
864 rt2x00_set_field32(®, TXCSR2_NUM_ATIM, rt2x00dev->atim->limit); in rt2500pci_init_queues()
865 rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); in rt2500pci_init_queues()
866 rt2x00mmio_register_write(rt2x00dev, TXCSR2, reg); in rt2500pci_init_queues()
868 entry_priv = rt2x00dev->tx[1].entries[0].priv_data; in rt2500pci_init_queues()
869 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR3); in rt2500pci_init_queues()
872 rt2x00mmio_register_write(rt2x00dev, TXCSR3, reg); in rt2500pci_init_queues()
874 entry_priv = rt2x00dev->tx[0].entries[0].priv_data; in rt2500pci_init_queues()
875 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR5); in rt2500pci_init_queues()
878 rt2x00mmio_register_write(rt2x00dev, TXCSR5, reg); in rt2500pci_init_queues()
880 entry_priv = rt2x00dev->atim->entries[0].priv_data; in rt2500pci_init_queues()
881 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR4); in rt2500pci_init_queues()
884 rt2x00mmio_register_write(rt2x00dev, TXCSR4, reg); in rt2500pci_init_queues()
886 entry_priv = rt2x00dev->bcn->entries[0].priv_data; in rt2500pci_init_queues()
887 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR6); in rt2500pci_init_queues()
890 rt2x00mmio_register_write(rt2x00dev, TXCSR6, reg); in rt2500pci_init_queues()
892 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR1); in rt2500pci_init_queues()
893 rt2x00_set_field32(®, RXCSR1_RXD_SIZE, rt2x00dev->rx->desc_size); in rt2500pci_init_queues()
894 rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); in rt2500pci_init_queues()
895 rt2x00mmio_register_write(rt2x00dev, RXCSR1, reg); in rt2500pci_init_queues()
897 entry_priv = rt2x00dev->rx->entries[0].priv_data; in rt2500pci_init_queues()
898 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR2); in rt2500pci_init_queues()
901 rt2x00mmio_register_write(rt2x00dev, RXCSR2, reg); in rt2500pci_init_queues()
906 static int rt2500pci_init_registers(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_registers() argument
910 rt2x00mmio_register_write(rt2x00dev, PSCSR0, 0x00020002); in rt2500pci_init_registers()
911 rt2x00mmio_register_write(rt2x00dev, PSCSR1, 0x00000002); in rt2500pci_init_registers()
912 rt2x00mmio_register_write(rt2x00dev, PSCSR2, 0x00020002); in rt2500pci_init_registers()
913 rt2x00mmio_register_write(rt2x00dev, PSCSR3, 0x00000002); in rt2500pci_init_registers()
915 reg = rt2x00mmio_register_read(rt2x00dev, TIMECSR); in rt2500pci_init_registers()
919 rt2x00mmio_register_write(rt2x00dev, TIMECSR, reg); in rt2500pci_init_registers()
921 reg = rt2x00mmio_register_read(rt2x00dev, CSR9); in rt2500pci_init_registers()
923 rt2x00dev->rx->data_size / 128); in rt2500pci_init_registers()
924 rt2x00mmio_register_write(rt2x00dev, CSR9, reg); in rt2500pci_init_registers()
929 reg = rt2x00mmio_register_read(rt2x00dev, CSR11); in rt2500pci_init_registers()
931 rt2x00mmio_register_write(rt2x00dev, CSR11, reg); in rt2500pci_init_registers()
933 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_init_registers()
942 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_init_registers()
944 rt2x00mmio_register_write(rt2x00dev, CNT3, 0); in rt2500pci_init_registers()
946 reg = rt2x00mmio_register_read(rt2x00dev, TXCSR8); in rt2500pci_init_registers()
955 rt2x00mmio_register_write(rt2x00dev, TXCSR8, reg); in rt2500pci_init_registers()
957 reg = rt2x00mmio_register_read(rt2x00dev, ARTCSR0); in rt2500pci_init_registers()
962 rt2x00mmio_register_write(rt2x00dev, ARTCSR0, reg); in rt2500pci_init_registers()
964 reg = rt2x00mmio_register_read(rt2x00dev, ARTCSR1); in rt2500pci_init_registers()
969 rt2x00mmio_register_write(rt2x00dev, ARTCSR1, reg); in rt2500pci_init_registers()
971 reg = rt2x00mmio_register_read(rt2x00dev, ARTCSR2); in rt2500pci_init_registers()
976 rt2x00mmio_register_write(rt2x00dev, ARTCSR2, reg); in rt2500pci_init_registers()
978 reg = rt2x00mmio_register_read(rt2x00dev, RXCSR3); in rt2500pci_init_registers()
987 rt2x00mmio_register_write(rt2x00dev, RXCSR3, reg); in rt2500pci_init_registers()
989 reg = rt2x00mmio_register_read(rt2x00dev, PCICSR); in rt2500pci_init_registers()
997 rt2x00mmio_register_write(rt2x00dev, PCICSR, reg); in rt2500pci_init_registers()
999 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0x3f3b3100); in rt2500pci_init_registers()
1001 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, 0x0000ff00); in rt2500pci_init_registers()
1002 rt2x00mmio_register_write(rt2x00dev, TESTCSR, 0x000000f0); in rt2500pci_init_registers()
1004 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) in rt2500pci_init_registers()
1007 rt2x00mmio_register_write(rt2x00dev, MACCSR0, 0x00213223); in rt2500pci_init_registers()
1008 rt2x00mmio_register_write(rt2x00dev, MACCSR1, 0x00235518); in rt2500pci_init_registers()
1010 reg = rt2x00mmio_register_read(rt2x00dev, MACCSR2); in rt2500pci_init_registers()
1012 rt2x00mmio_register_write(rt2x00dev, MACCSR2, reg); in rt2500pci_init_registers()
1014 reg = rt2x00mmio_register_read(rt2x00dev, RALINKCSR); in rt2500pci_init_registers()
1021 rt2x00mmio_register_write(rt2x00dev, RALINKCSR, reg); in rt2500pci_init_registers()
1023 rt2x00mmio_register_write(rt2x00dev, BBPCSR1, 0x82188200); in rt2500pci_init_registers()
1025 rt2x00mmio_register_write(rt2x00dev, TXACKCSR0, 0x00000020); in rt2500pci_init_registers()
1027 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2500pci_init_registers()
1031 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers()
1033 reg = rt2x00mmio_register_read(rt2x00dev, CSR1); in rt2500pci_init_registers()
1036 rt2x00mmio_register_write(rt2x00dev, CSR1, reg); in rt2500pci_init_registers()
1043 reg = rt2x00mmio_register_read(rt2x00dev, CNT0); in rt2500pci_init_registers()
1044 reg = rt2x00mmio_register_read(rt2x00dev, CNT4); in rt2500pci_init_registers()
1049 static int rt2500pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) in rt2500pci_wait_bbp_ready() argument
1055 value = rt2500pci_bbp_read(rt2x00dev, 0); in rt2500pci_wait_bbp_ready()
1061 rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n"); in rt2500pci_wait_bbp_ready()
1065 static int rt2500pci_init_bbp(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_bbp() argument
1072 if (unlikely(rt2500pci_wait_bbp_ready(rt2x00dev))) in rt2500pci_init_bbp()
1075 rt2500pci_bbp_write(rt2x00dev, 3, 0x02); in rt2500pci_init_bbp()
1076 rt2500pci_bbp_write(rt2x00dev, 4, 0x19); in rt2500pci_init_bbp()
1077 rt2500pci_bbp_write(rt2x00dev, 14, 0x1c); in rt2500pci_init_bbp()
1078 rt2500pci_bbp_write(rt2x00dev, 15, 0x30); in rt2500pci_init_bbp()
1079 rt2500pci_bbp_write(rt2x00dev, 16, 0xac); in rt2500pci_init_bbp()
1080 rt2500pci_bbp_write(rt2x00dev, 18, 0x18); in rt2500pci_init_bbp()
1081 rt2500pci_bbp_write(rt2x00dev, 19, 0xff); in rt2500pci_init_bbp()
1082 rt2500pci_bbp_write(rt2x00dev, 20, 0x1e); in rt2500pci_init_bbp()
1083 rt2500pci_bbp_write(rt2x00dev, 21, 0x08); in rt2500pci_init_bbp()
1084 rt2500pci_bbp_write(rt2x00dev, 22, 0x08); in rt2500pci_init_bbp()
1085 rt2500pci_bbp_write(rt2x00dev, 23, 0x08); in rt2500pci_init_bbp()
1086 rt2500pci_bbp_write(rt2x00dev, 24, 0x70); in rt2500pci_init_bbp()
1087 rt2500pci_bbp_write(rt2x00dev, 25, 0x40); in rt2500pci_init_bbp()
1088 rt2500pci_bbp_write(rt2x00dev, 26, 0x08); in rt2500pci_init_bbp()
1089 rt2500pci_bbp_write(rt2x00dev, 27, 0x23); in rt2500pci_init_bbp()
1090 rt2500pci_bbp_write(rt2x00dev, 30, 0x10); in rt2500pci_init_bbp()
1091 rt2500pci_bbp_write(rt2x00dev, 31, 0x2b); in rt2500pci_init_bbp()
1092 rt2500pci_bbp_write(rt2x00dev, 32, 0xb9); in rt2500pci_init_bbp()
1093 rt2500pci_bbp_write(rt2x00dev, 34, 0x12); in rt2500pci_init_bbp()
1094 rt2500pci_bbp_write(rt2x00dev, 35, 0x50); in rt2500pci_init_bbp()
1095 rt2500pci_bbp_write(rt2x00dev, 39, 0xc4); in rt2500pci_init_bbp()
1096 rt2500pci_bbp_write(rt2x00dev, 40, 0x02); in rt2500pci_init_bbp()
1097 rt2500pci_bbp_write(rt2x00dev, 41, 0x60); in rt2500pci_init_bbp()
1098 rt2500pci_bbp_write(rt2x00dev, 53, 0x10); in rt2500pci_init_bbp()
1099 rt2500pci_bbp_write(rt2x00dev, 54, 0x18); in rt2500pci_init_bbp()
1100 rt2500pci_bbp_write(rt2x00dev, 56, 0x08); in rt2500pci_init_bbp()
1101 rt2500pci_bbp_write(rt2x00dev, 57, 0x10); in rt2500pci_init_bbp()
1102 rt2500pci_bbp_write(rt2x00dev, 58, 0x08); in rt2500pci_init_bbp()
1103 rt2500pci_bbp_write(rt2x00dev, 61, 0x6d); in rt2500pci_init_bbp()
1104 rt2500pci_bbp_write(rt2x00dev, 62, 0x10); in rt2500pci_init_bbp()
1107 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i); in rt2500pci_init_bbp()
1112 rt2500pci_bbp_write(rt2x00dev, reg_id, value); in rt2500pci_init_bbp()
1122 static void rt2500pci_toggle_irq(struct rt2x00_dev *rt2x00dev, in rt2500pci_toggle_irq() argument
1134 reg = rt2x00mmio_register_read(rt2x00dev, CSR7); in rt2500pci_toggle_irq()
1135 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2500pci_toggle_irq()
1142 spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags); in rt2500pci_toggle_irq()
1144 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_toggle_irq()
1150 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_toggle_irq()
1152 spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags); in rt2500pci_toggle_irq()
1158 tasklet_kill(&rt2x00dev->txstatus_tasklet); in rt2500pci_toggle_irq()
1159 tasklet_kill(&rt2x00dev->rxdone_tasklet); in rt2500pci_toggle_irq()
1160 tasklet_kill(&rt2x00dev->tbtt_tasklet); in rt2500pci_toggle_irq()
1164 static int rt2500pci_enable_radio(struct rt2x00_dev *rt2x00dev) in rt2500pci_enable_radio() argument
1169 if (unlikely(rt2500pci_init_queues(rt2x00dev) || in rt2500pci_enable_radio()
1170 rt2500pci_init_registers(rt2x00dev) || in rt2500pci_enable_radio()
1171 rt2500pci_init_bbp(rt2x00dev))) in rt2500pci_enable_radio()
1177 static void rt2500pci_disable_radio(struct rt2x00_dev *rt2x00dev) in rt2500pci_disable_radio() argument
1182 rt2x00mmio_register_write(rt2x00dev, PWRCSR0, 0); in rt2500pci_disable_radio()
1185 static int rt2500pci_set_state(struct rt2x00_dev *rt2x00dev, in rt2500pci_set_state() argument
1196 reg = rt2x00mmio_register_read(rt2x00dev, PWRCSR1); in rt2500pci_set_state()
1201 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2500pci_set_state()
1209 reg2 = rt2x00mmio_register_read(rt2x00dev, PWRCSR1); in rt2500pci_set_state()
1214 rt2x00mmio_register_write(rt2x00dev, PWRCSR1, reg); in rt2500pci_set_state()
1221 static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev, in rt2500pci_set_device_state() argument
1228 retval = rt2500pci_enable_radio(rt2x00dev); in rt2500pci_set_device_state()
1231 rt2500pci_disable_radio(rt2x00dev); in rt2500pci_set_device_state()
1235 rt2500pci_toggle_irq(rt2x00dev, state); in rt2500pci_set_device_state()
1241 retval = rt2500pci_set_state(rt2x00dev, state); in rt2500pci_set_device_state()
1249 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n", in rt2500pci_set_device_state()
1331 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; in rt2500pci_write_beacon() local
1338 reg = rt2x00mmio_register_read(rt2x00dev, CSR14); in rt2500pci_write_beacon()
1340 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_write_beacon()
1343 rt2x00_err(rt2x00dev, "Fail to map beacon, aborting\n"); in rt2500pci_write_beacon()
1355 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry); in rt2500pci_write_beacon()
1361 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_write_beacon()
1390 entry->queue->rt2x00dev->rssi_offset; in rt2500pci_fill_rxdone()
1404 static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, in rt2500pci_txdone() argument
1407 struct data_queue *queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx); in rt2500pci_txdone()
1443 static inline void rt2500pci_enable_interrupt(struct rt2x00_dev *rt2x00dev, in rt2500pci_enable_interrupt() argument
1452 spin_lock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_enable_interrupt()
1454 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_enable_interrupt()
1456 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_enable_interrupt()
1458 spin_unlock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_enable_interrupt()
1463 struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data; in rt2500pci_txstatus_tasklet() local
1469 rt2500pci_txdone(rt2x00dev, QID_ATIM); in rt2500pci_txstatus_tasklet()
1470 rt2500pci_txdone(rt2x00dev, QID_AC_VO); in rt2500pci_txstatus_tasklet()
1471 rt2500pci_txdone(rt2x00dev, QID_AC_VI); in rt2500pci_txstatus_tasklet()
1476 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) { in rt2500pci_txstatus_tasklet()
1477 spin_lock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_txstatus_tasklet()
1479 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_txstatus_tasklet()
1483 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_txstatus_tasklet()
1485 spin_unlock_irq(&rt2x00dev->irqmask_lock); in rt2500pci_txstatus_tasklet()
1491 struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data; in rt2500pci_tbtt_tasklet() local
1492 rt2x00lib_beacondone(rt2x00dev); in rt2500pci_tbtt_tasklet()
1493 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) in rt2500pci_tbtt_tasklet()
1494 rt2500pci_enable_interrupt(rt2x00dev, CSR8_TBCN_EXPIRE); in rt2500pci_tbtt_tasklet()
1499 struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data; in rt2500pci_rxdone_tasklet() local
1500 if (rt2x00mmio_rxdone(rt2x00dev)) in rt2500pci_rxdone_tasklet()
1501 tasklet_schedule(&rt2x00dev->rxdone_tasklet); in rt2500pci_rxdone_tasklet()
1502 else if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) in rt2500pci_rxdone_tasklet()
1503 rt2500pci_enable_interrupt(rt2x00dev, CSR8_RXDONE); in rt2500pci_rxdone_tasklet()
1508 struct rt2x00_dev *rt2x00dev = dev_instance; in rt2500pci_interrupt() local
1515 reg = rt2x00mmio_register_read(rt2x00dev, CSR7); in rt2500pci_interrupt()
1516 rt2x00mmio_register_write(rt2x00dev, CSR7, reg); in rt2500pci_interrupt()
1521 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) in rt2500pci_interrupt()
1530 tasklet_hi_schedule(&rt2x00dev->tbtt_tasklet); in rt2500pci_interrupt()
1533 tasklet_schedule(&rt2x00dev->rxdone_tasklet); in rt2500pci_interrupt()
1538 tasklet_schedule(&rt2x00dev->txstatus_tasklet); in rt2500pci_interrupt()
1551 spin_lock(&rt2x00dev->irqmask_lock); in rt2500pci_interrupt()
1553 reg = rt2x00mmio_register_read(rt2x00dev, CSR8); in rt2500pci_interrupt()
1555 rt2x00mmio_register_write(rt2x00dev, CSR8, reg); in rt2500pci_interrupt()
1557 spin_unlock(&rt2x00dev->irqmask_lock); in rt2500pci_interrupt()
1565 static int rt2500pci_validate_eeprom(struct rt2x00_dev *rt2x00dev) in rt2500pci_validate_eeprom() argument
1572 reg = rt2x00mmio_register_read(rt2x00dev, CSR21); in rt2500pci_validate_eeprom()
1574 eeprom.data = rt2x00dev; in rt2500pci_validate_eeprom()
1584 eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom, in rt2500pci_validate_eeprom()
1590 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); in rt2500pci_validate_eeprom()
1591 rt2x00lib_set_mac_address(rt2x00dev, mac); in rt2500pci_validate_eeprom()
1593 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA); in rt2500pci_validate_eeprom()
1605 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); in rt2500pci_validate_eeprom()
1606 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word); in rt2500pci_validate_eeprom()
1609 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC); in rt2500pci_validate_eeprom()
1614 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); in rt2500pci_validate_eeprom()
1615 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word); in rt2500pci_validate_eeprom()
1618 word = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET); in rt2500pci_validate_eeprom()
1622 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); in rt2500pci_validate_eeprom()
1623 rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n", in rt2500pci_validate_eeprom()
1630 static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev) in rt2500pci_init_eeprom() argument
1639 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA); in rt2500pci_init_eeprom()
1645 reg = rt2x00mmio_register_read(rt2x00dev, CSR0); in rt2500pci_init_eeprom()
1646 rt2x00_set_chip(rt2x00dev, RT2560, value, in rt2500pci_init_eeprom()
1649 if (!rt2x00_rf(rt2x00dev, RF2522) && in rt2500pci_init_eeprom()
1650 !rt2x00_rf(rt2x00dev, RF2523) && in rt2500pci_init_eeprom()
1651 !rt2x00_rf(rt2x00dev, RF2524) && in rt2500pci_init_eeprom()
1652 !rt2x00_rf(rt2x00dev, RF2525) && in rt2500pci_init_eeprom()
1653 !rt2x00_rf(rt2x00dev, RF2525E) && in rt2500pci_init_eeprom()
1654 !rt2x00_rf(rt2x00dev, RF5222)) { in rt2500pci_init_eeprom()
1655 rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n"); in rt2500pci_init_eeprom()
1662 rt2x00dev->default_ant.tx = in rt2500pci_init_eeprom()
1664 rt2x00dev->default_ant.rx = in rt2500pci_init_eeprom()
1673 rt2500pci_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); in rt2500pci_init_eeprom()
1677 rt2500pci_init_led(rt2x00dev, &rt2x00dev->led_qual, in rt2500pci_init_eeprom()
1685 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags); in rt2500pci_init_eeprom()
1689 __set_bit(REQUIRE_DELAYED_RFKILL, &rt2x00dev->cap_flags); in rt2500pci_init_eeprom()
1695 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC); in rt2500pci_init_eeprom()
1697 __set_bit(CAPABILITY_LINK_TUNING, &rt2x00dev->cap_flags); in rt2500pci_init_eeprom()
1702 eeprom = rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET); in rt2500pci_init_eeprom()
1703 rt2x00dev->rssi_offset = in rt2500pci_init_eeprom()
1864 static int rt2500pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev) in rt2500pci_probe_hw_mode() argument
1866 struct hw_mode_spec *spec = &rt2x00dev->spec; in rt2500pci_probe_hw_mode()
1874 ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK); in rt2500pci_probe_hw_mode()
1875 ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS); in rt2500pci_probe_hw_mode()
1876 ieee80211_hw_set(rt2x00dev->hw, HOST_BROADCAST_PS_BUFFERING); in rt2500pci_probe_hw_mode()
1877 ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM); in rt2500pci_probe_hw_mode()
1879 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); in rt2500pci_probe_hw_mode()
1880 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, in rt2500pci_probe_hw_mode()
1881 rt2x00_eeprom_addr(rt2x00dev, in rt2500pci_probe_hw_mode()
1887 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; in rt2500pci_probe_hw_mode()
1895 if (rt2x00_rf(rt2x00dev, RF2522)) { in rt2500pci_probe_hw_mode()
1898 } else if (rt2x00_rf(rt2x00dev, RF2523)) { in rt2500pci_probe_hw_mode()
1901 } else if (rt2x00_rf(rt2x00dev, RF2524)) { in rt2500pci_probe_hw_mode()
1904 } else if (rt2x00_rf(rt2x00dev, RF2525)) { in rt2500pci_probe_hw_mode()
1907 } else if (rt2x00_rf(rt2x00dev, RF2525E)) { in rt2500pci_probe_hw_mode()
1910 } else if (rt2x00_rf(rt2x00dev, RF5222)) { in rt2500pci_probe_hw_mode()
1925 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); in rt2500pci_probe_hw_mode()
1941 static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev) in rt2500pci_probe_hw() argument
1949 retval = rt2500pci_validate_eeprom(rt2x00dev); in rt2500pci_probe_hw()
1953 retval = rt2500pci_init_eeprom(rt2x00dev); in rt2500pci_probe_hw()
1961 reg = rt2x00mmio_register_read(rt2x00dev, GPIOCSR); in rt2500pci_probe_hw()
1963 rt2x00mmio_register_write(rt2x00dev, GPIOCSR, reg); in rt2500pci_probe_hw()
1968 retval = rt2500pci_probe_hw_mode(rt2x00dev); in rt2500pci_probe_hw()
1975 __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags); in rt2500pci_probe_hw()
1976 __set_bit(REQUIRE_DMA, &rt2x00dev->cap_flags); in rt2500pci_probe_hw()
1977 __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags); in rt2500pci_probe_hw()
1982 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; in rt2500pci_probe_hw()
1993 struct rt2x00_dev *rt2x00dev = hw->priv; in rt2500pci_get_tsf() local
1997 reg = rt2x00mmio_register_read(rt2x00dev, CSR17); in rt2500pci_get_tsf()
1999 reg = rt2x00mmio_register_read(rt2x00dev, CSR16); in rt2500pci_get_tsf()
2007 struct rt2x00_dev *rt2x00dev = hw->priv; in rt2500pci_tx_last_beacon() local
2010 reg = rt2x00mmio_register_read(rt2x00dev, CSR15); in rt2500pci_tx_last_beacon()