Lines Matching refs:rt2x00_get_field32
107 value = rt2x00_get_field32(reg, BBPCSR_VALUE); in rt2400pci_bbp_read()
146 eeprom->reg_data_in = !!rt2x00_get_field32(reg, CSR21_EEPROM_DATA_IN); in rt2400pci_eepromregister_read()
147 eeprom->reg_data_out = !!rt2x00_get_field32(reg, CSR21_EEPROM_DATA_OUT); in rt2400pci_eepromregister_read()
149 !!rt2x00_get_field32(reg, CSR21_EEPROM_DATA_CLOCK); in rt2400pci_eepromregister_read()
151 !!rt2x00_get_field32(reg, CSR21_EEPROM_CHIP_SELECT); in rt2400pci_eepromregister_read()
209 return rt2x00_get_field32(reg, GPIOCSR_VAL0); in rt2400pci_rfkill_poll()
591 qual->rx_failed = rt2x00_get_field32(reg, CNT0_FCS_ERROR); in rt2400pci_link_stats()
733 return rt2x00_get_field32(word, RXD_W0_OWNER_NIC); in rt2400pci_get_entry_state()
737 return (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt2400pci_get_entry_state()
738 rt2x00_get_field32(word, TXD_W0_VALID)); in rt2400pci_get_entry_state()
1057 bbp_state = rt2x00_get_field32(reg2, PWRCSR1_BBP_CURR_STATE); in rt2400pci_set_state()
1058 rf_state = rt2x00_get_field32(reg2, PWRCSR1_RF_CURR_STATE); in rt2400pci_set_state()
1236 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) in rt2400pci_fill_rxdone()
1238 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) in rt2400pci_fill_rxdone()
1251 rx_low = rt2x00_get_field32(word4, RXD_W4_RX_END_TIME); in rt2400pci_fill_rxdone()
1263 rxdesc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL) & ~0x08; in rt2400pci_fill_rxdone()
1264 rxdesc->rssi = rt2x00_get_field32(word3, RXD_W3_RSSI) - in rt2400pci_fill_rxdone()
1266 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); in rt2400pci_fill_rxdone()
1269 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) in rt2400pci_fill_rxdone()
1290 if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || in rt2400pci_txdone()
1291 !rt2x00_get_field32(word, TXD_W0_VALID)) in rt2400pci_txdone()
1298 switch (rt2x00_get_field32(word, TXD_W0_RESULT)) { in rt2400pci_txdone()
1309 txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); in rt2400pci_txdone()
1401 if (rt2x00_get_field32(reg, CSR7_TBCN_EXPIRE)) in rt2400pci_interrupt()
1404 if (rt2x00_get_field32(reg, CSR7_RXDONE)) in rt2400pci_interrupt()
1407 if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING) || in rt2400pci_interrupt()
1408 rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING) || in rt2400pci_interrupt()
1409 rt2x00_get_field32(reg, CSR7_TXDONE_TXRING)) { in rt2400pci_interrupt()
1451 eeprom.width = rt2x00_get_field32(reg, CSR21_TYPE_93C46) ? in rt2400pci_validate_eeprom()
1493 rt2x00_get_field32(reg, CSR0_REVISION)); in rt2400pci_init_eeprom()
1699 tsf = (u64) rt2x00_get_field32(reg, CSR17_HIGH_TSFTIMER) << 32; in rt2400pci_get_tsf()
1701 tsf |= rt2x00_get_field32(reg, CSR16_LOW_TSFTIMER); in rt2400pci_get_tsf()
1712 return rt2x00_get_field32(reg, CSR15_BEACON_SENT); in rt2400pci_tx_last_beacon()