Lines Matching refs:mt76_rr
22 mt76_rr(dev, MT_RX_STAT_0); in mt76x2u_mac_reset_counters()
23 mt76_rr(dev, MT_RX_STAT_1); in mt76x2u_mac_reset_counters()
24 mt76_rr(dev, MT_RX_STAT_2); in mt76x2u_mac_reset_counters()
25 mt76_rr(dev, MT_TX_STA_0); in mt76x2u_mac_reset_counters()
26 mt76_rr(dev, MT_TX_STA_1); in mt76x2u_mac_reset_counters()
27 mt76_rr(dev, MT_TX_STA_2); in mt76x2u_mac_reset_counters()
143 rts_cfg = mt76_rr(dev, MT_TX_RTS_CFG); in mt76x2u_mac_stop()
151 val = mt76_rr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG)); in mt76x2u_mac_stop()
159 if (!(mt76_rr(dev, 0x0438) & 0xffffffff) && in mt76x2u_mac_stop()
160 !(mt76_rr(dev, 0x0a30) & 0x000000ff) && in mt76x2u_mac_stop()
161 !(mt76_rr(dev, 0x0a34) & 0xff00ff00)) in mt76x2u_mac_stop()
173 if (!(mt76_rr(dev, MT_MAC_STATUS) & MT_MAC_STATUS_TX) && in mt76x2u_mac_stop()
174 !mt76_rr(dev, MT_BBP(IBI, 12))) { in mt76x2u_mac_stop()
191 if (!(mt76_rr(dev, 0x0430) & 0x00ff0000) && in mt76x2u_mac_stop()
192 !(mt76_rr(dev, 0x0a30) & 0xffffffff) && in mt76x2u_mac_stop()
193 !(mt76_rr(dev, 0x0a34) & 0xffffffff) && in mt76x2u_mac_stop()
204 val = mt76_rr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG)); in mt76x2u_mac_stop()