274 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG,  in iwl_trans_pcie_read_shr()
281 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_DATA_REG, val);  in iwl_trans_pcie_write_shr()
282 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG,  in iwl_trans_pcie_write_shr()
711 	iwl_write32(trans, FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
714 	iwl_write32(trans, FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
717 	iwl_write32(trans, FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
720 	iwl_write32(trans, FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
724 	iwl_write32(trans, FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
729 	iwl_write32(trans, FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
951 			iwl_write32(trans, addr, val);  in iwl_pcie_apply_destination()
1047 	iwl_write32(trans, CSR_RESET, 0);  in iwl_pcie_load_given_ucode()
1196 	iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~val);  in iwl_pcie_map_rx_causes()
1372 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_start_fw()
1402 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
1403 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,  in iwl_trans_pcie_start_fw()
1407 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_start_fw()
1425 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
1426 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
2049 			iwl_write32(trans, CSR_RESET,  in iwl_trans_pcie_grab_nic_access()
2104 		iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);  in iwl_trans_pcie_read_mem()
2122 		iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);  in iwl_trans_pcie_write_mem()
2124 			iwl_write32(trans, HBUS_TARG_MEM_WDAT,  in iwl_trans_pcie_write_mem()
2203 				iwl_write32(trans, HBUS_TARG_WRPTR,  in iwl_trans_pcie_block_txq_ptrs()