487 	b43_write32(dev, B43_MMIO_RAM_CONTROL, offset);  in b43_ram_write()
489 	b43_write32(dev, B43_MMIO_RAM_DATA, val);  in b43_ram_write()
501 	b43_write32(dev, B43_MMIO_SHM_CONTROL, control);  in b43_shm_control_word()
565 	b43_write32(dev, B43_MMIO_SHM_DATA, value);  in b43_shm_write32()
658 	b43_write32(dev, B43_MMIO_REV3PLUS_TSF_LOW, low);  in b43_tsf_write_locked()
660 	b43_write32(dev, B43_MMIO_REV3PLUS_TSF_HIGH, high);  in b43_tsf_write_locked()
1202 	b43_write32(dev, B43_MMIO_MACCTL, macctl);  in b43_power_saving_ctl_bits()
1345 	b43_write32(dev, B43_MMIO_MACCTL, macctl);  in b43_wireless_core_reset()
1415 	b43_write32(dev, B43_MMIO_MACCMD,  in b43_generate_noise_sample()
1518 		b43_write32(dev, B43_MMIO_MACCMD,  in handle_irq_atim_end()
1763 		b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);  in handle_irq_beacon()
1776 		b43_write32(dev, B43_MMIO_MACCMD, cmd);  in handle_irq_beacon()
1782 			b43_write32(dev, B43_MMIO_MACCMD, cmd);  in handle_irq_beacon()
1787 			b43_write32(dev, B43_MMIO_MACCMD, cmd);  in handle_irq_beacon()
1802 			b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);  in b43_do_beacon_update_trigger_work()
1873 		b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));  in b43_set_beacon_int()
1874 		b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));  in b43_set_beacon_int()
2061 	b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);  in b43_do_interrupt_thread()
2117 	b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, reason);  in b43_do_interrupt()
2118 	b43_write32(dev, B43_MMIO_DMA0_REASON, dev->dma_reason[0]);  in b43_do_interrupt()
2119 	b43_write32(dev, B43_MMIO_DMA1_REASON, dev->dma_reason[1]);  in b43_do_interrupt()
2120 	b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]);  in b43_do_interrupt()
2121 	b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]);  in b43_do_interrupt()
2122 	b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]);  in b43_do_interrupt()
2128 	b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);  in b43_do_interrupt()
2643 	b43_write32(dev, B43_MMIO_MACCTL, macctl);  in b43_upload_microcode()
2655 		b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i]));  in b43_upload_microcode()
2664 		b43_write32(dev, B43_MMIO_SHM_DATA, 0x00004000);  in b43_upload_microcode()
2668 			b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i]));  in b43_upload_microcode()
2673 	b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_ALL);  in b43_upload_microcode()
2805 			b43_write32(dev, offset, value);  in b43_write_initvals()
2990 		b43_write32(dev, B43_MMIO_GEN_IRQ_REASON,  in b43_mac_enable()
3153 	b43_write32(dev, B43_MMIO_MACCTL, ctl);  in b43_adjust_opmode()
3273 	b43_write32(dev, B43_MMIO_MACCTL, macctl);  in b43_chip_init()
3311 	b43_write32(dev, 0x0100, 0x01000000);  in b43_chip_init()
3313 		b43_write32(dev, 0x010C, 0x01000000);  in b43_chip_init()
3331 		b43_write32(dev, 0x0188, 0x80000000);  in b43_chip_init()
3332 		b43_write32(dev, 0x018C, 0x02000000);  in b43_chip_init()
3334 	b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, 0x00004000);  in b43_chip_init()
3335 	b43_write32(dev, B43_MMIO_DMA0_IRQ_MASK, 0x0001FC00);  in b43_chip_init()
3336 	b43_write32(dev, B43_MMIO_DMA1_IRQ_MASK, 0x0000DC00);  in b43_chip_init()
3337 	b43_write32(dev, B43_MMIO_DMA2_IRQ_MASK, 0x0000DC00);  in b43_chip_init()
3338 	b43_write32(dev, B43_MMIO_DMA3_IRQ_MASK, 0x0001DC00);  in b43_chip_init()
3339 	b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00);  in b43_chip_init()
3340 	b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00);  in b43_chip_init()
3524 		b43_write32(dev, B43_MMIO_TSF_CFP_START, 0xCCCCBBBB);  in b43_validate_chipaccess()
3530 	b43_write32(dev, B43_MMIO_TSF_CFP_START, 0);  in b43_validate_chipaccess()
4374 		b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);  in b43_wireless_core_stop()
4378 		b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);  in b43_wireless_core_stop()
4449 	b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);  in b43_wireless_core_start()