Lines Matching defs:ath9k_ops_config
333 struct ath9k_ops_config { struct
334 int dma_beacon_response_time;
335 int sw_beacon_response_time;
336 bool cwm_ignore_extcca;
337 u32 pcie_waen;
338 u8 analog_shiftreg;
339 u32 ofdm_trig_low;
340 u32 ofdm_trig_high;
341 u32 cck_trig_high;
342 u32 cck_trig_low;
343 bool enable_paprd;
344 int serialize_regmode;
345 bool rx_intr_mitigation;
346 bool tx_intr_mitigation;
347 u8 max_txtrig_level;
348 u16 ani_poll_interval; /* ANI poll interval in ms */
349 u16 hw_hang_checks;
350 u16 rimt_first;
351 u16 rimt_last;
354 u32 aspm_l1_fix;
355 u32 xlna_gpio;
356 u32 ant_ctrl_comm2g_switch_enable;
357 bool xatten_margin_cfg;
358 bool alt_mingainidx;
359 u8 pll_pwrsave;
360 bool tx_gain_buffalo;
361 bool led_active_high;