Lines Matching refs:pBase
134 struct base_eep_header_4k *pBase = &eep->baseEepHeader; in ath9k_hw_4k_dump_eeprom() local
135 u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber); in ath9k_hw_4k_dump_eeprom()
147 PR_EEP("Checksum", le16_to_cpu(pBase->checksum)); in ath9k_hw_4k_dump_eeprom()
148 PR_EEP("Length", le16_to_cpu(pBase->length)); in ath9k_hw_4k_dump_eeprom()
149 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); in ath9k_hw_4k_dump_eeprom()
150 PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1])); in ath9k_hw_4k_dump_eeprom()
151 PR_EEP("TX Mask", pBase->txMask); in ath9k_hw_4k_dump_eeprom()
152 PR_EEP("RX Mask", pBase->rxMask); in ath9k_hw_4k_dump_eeprom()
153 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); in ath9k_hw_4k_dump_eeprom()
154 PR_EEP("Allow 2GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11G)); in ath9k_hw_4k_dump_eeprom()
155 PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags & in ath9k_hw_4k_dump_eeprom()
157 PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags & in ath9k_hw_4k_dump_eeprom()
159 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags & in ath9k_hw_4k_dump_eeprom()
161 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & in ath9k_hw_4k_dump_eeprom()
163 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); in ath9k_hw_4k_dump_eeprom()
167 PR_EEP("TX Gain type", pBase->txGainType); in ath9k_hw_4k_dump_eeprom()
170 pBase->macAddr); in ath9k_hw_4k_dump_eeprom()
239 struct base_eep_header_4k *pBase = &eep->baseEepHeader; in ath9k_hw_4k_get_eeprom() local
245 return get_unaligned_be16(pBase->macAddr); in ath9k_hw_4k_get_eeprom()
247 return get_unaligned_be16(pBase->macAddr + 2); in ath9k_hw_4k_get_eeprom()
249 return get_unaligned_be16(pBase->macAddr + 4); in ath9k_hw_4k_get_eeprom()
251 return le16_to_cpu(pBase->regDmn[0]); in ath9k_hw_4k_get_eeprom()
253 return le16_to_cpu(pBase->deviceCap); in ath9k_hw_4k_get_eeprom()
255 return pBase->opCapFlags; in ath9k_hw_4k_get_eeprom()
257 return le16_to_cpu(pBase->rfSilent); in ath9k_hw_4k_get_eeprom()
263 return pBase->txMask; in ath9k_hw_4k_get_eeprom()
265 return pBase->rxMask; in ath9k_hw_4k_get_eeprom()
275 return pBase->txGainType; in ath9k_hw_4k_get_eeprom()
761 struct base_eep_header_4k *pBase = &eep->baseEepHeader; in ath9k_hw_4k_set_board_values() local
1008 if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) { in ath9k_hw_4k_set_board_values()