1120 			aniState->iniDef.m1ThreshLow : m1ThreshLow_off;  in ar9003_hw_ani_control()
1122 			aniState->iniDef.m2ThreshLow : m2ThreshLow_off;  in ar9003_hw_ani_control()
1124 			aniState->iniDef.m1Thresh : m1Thresh_off;  in ar9003_hw_ani_control()
1126 			aniState->iniDef.m2Thresh : m2Thresh_off;  in ar9003_hw_ani_control()
1128 			aniState->iniDef.m2CountThr : m2CountThr_off;  in ar9003_hw_ani_control()
1130 			aniState->iniDef.m2CountThrLow : m2CountThrLow_off;  in ar9003_hw_ani_control()
1132 			aniState->iniDef.m1ThreshLowExt : m1ThreshLowExt_off;  in ar9003_hw_ani_control()
1134 			aniState->iniDef.m2ThreshLowExt : m2ThreshLowExt_off;  in ar9003_hw_ani_control()
1136 			aniState->iniDef.m1ThreshExt : m1ThreshExt_off;  in ar9003_hw_ani_control()
1138 			aniState->iniDef.m2ThreshExt : m2ThreshExt_off;  in ar9003_hw_ani_control()
1209 			aniState->iniDef.firstep;  in ar9003_hw_ani_control()
1224 			 aniState->iniDef.firstepLow;  in ar9003_hw_ani_control()
1241 				aniState->iniDef.firstep);  in ar9003_hw_ani_control()
1249 				aniState->iniDef.firstepLow);  in ar9003_hw_ani_control()
1273 			aniState->iniDef.cycpwrThr1;  in ar9003_hw_ani_control()
1289 			 aniState->iniDef.cycpwrThr1Ext;  in ar9003_hw_ani_control()
1305 				aniState->iniDef.cycpwrThr1);  in ar9003_hw_ani_control()
1313 				aniState->iniDef.cycpwrThr1Ext);  in ar9003_hw_ani_control()
1424 	struct ath9k_ani_default *iniDef;  in ar9003_hw_ani_cache_ini_regs()  local
1428 	iniDef = &aniState->iniDef;  in ar9003_hw_ani_cache_ini_regs()
1437 	iniDef->m1Thresh = MS(val, AR_PHY_SFCORR_M1_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1438 	iniDef->m2Thresh = MS(val, AR_PHY_SFCORR_M2_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1439 	iniDef->m2CountThr = MS(val, AR_PHY_SFCORR_M2COUNT_THR);  in ar9003_hw_ani_cache_ini_regs()
1442 	iniDef->m1ThreshLow = MS(val, AR_PHY_SFCORR_LOW_M1_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1443 	iniDef->m2ThreshLow = MS(val, AR_PHY_SFCORR_LOW_M2_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1444 	iniDef->m2CountThrLow = MS(val, AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW);  in ar9003_hw_ani_cache_ini_regs()
1447 	iniDef->m1ThreshExt = MS(val, AR_PHY_SFCORR_EXT_M1_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1448 	iniDef->m2ThreshExt = MS(val, AR_PHY_SFCORR_EXT_M2_THRESH);  in ar9003_hw_ani_cache_ini_regs()
1449 	iniDef->m1ThreshLowExt = MS(val, AR_PHY_SFCORR_EXT_M1_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1450 	iniDef->m2ThreshLowExt = MS(val, AR_PHY_SFCORR_EXT_M2_THRESH_LOW);  in ar9003_hw_ani_cache_ini_regs()
1451 	iniDef->firstep = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()
1454 	iniDef->firstepLow = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()
1457 	iniDef->cycpwrThr1 = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()
1460 	iniDef->cycpwrThr1Ext = REG_READ_FIELD(ah,  in ar9003_hw_ani_cache_ini_regs()