644 		(REG_READ(ah, AR_PHY_GEN_CTRL) & AR_PHY_GC_ENABLE_DAC_FIFO);  in ar9003_hw_set_channel_regs()
662 	phymode |= REG_READ(ah, AR_PHY_GEN_CTRL);  in ar9003_hw_set_channel_regs()
687 	synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;  in ar9003_hw_init_bb()
730 	val = REG_READ(ah, AR_PCU_MISC_MODE2) & (~AR_ADHOC_MCAST_KEYID_ENABLE);  in ar9003_hw_override_ini()
748 	if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)  in ar9003_hw_override_ini()
1085 	u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;  in ar9003_hw_rfbus_done()
1379 			nf = MS(REG_READ(ah, ah->nf_regs[i]),  in ar9003_hw_do_getnf()
1386 				nf = MS(REG_READ(ah, ah->nf_regs[ext_idx]),  in ar9003_hw_do_getnf()
1436 	val = REG_READ(ah, AR_PHY_SFCORR);  in ar9003_hw_ani_cache_ini_regs()
1441 	val = REG_READ(ah, AR_PHY_SFCORR_LOW);  in ar9003_hw_ani_cache_ini_regs()
1446 	val = REG_READ(ah, AR_PHY_SFCORR_EXT);  in ar9003_hw_ani_cache_ini_regs()
1489 	radar_1 = REG_READ(ah, AR_PHY_RADAR_1);  in ar9003_hw_set_radar_params()
1530 	regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_antdiv_comb_conf_get()
1562 	regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_antdiv_comb_conf_set()
1610 	regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
1619 		regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
1630 		regval = REG_READ(ah, AR_PHY_CCK_DETECT);  in ar9003_hw_set_bt_ant_diversity()
1639 			regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
1678 			regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);  in ar9003_hw_set_bt_ant_diversity()
2034 		val = REG_READ(ah, AR_PHY_RADAR_0);  in ar9003_hw_bb_watchdog_check()
2039 		val = REG_READ(ah, AR_PHY_RADAR_0);  in ar9003_hw_bb_watchdog_check()
2074 			  REG_READ(ah, AR_PHY_WATCHDOG_CTL_2) &  in ar9003_hw_bb_watchdog_config()
2080 			  REG_READ(ah, AR_PHY_WATCHDOG_CTL_1) &  in ar9003_hw_bb_watchdog_config()
2089 	val = REG_READ(ah, AR_PHY_WATCHDOG_CTL_2) & AR_PHY_WATCHDOG_CNTL2_MASK;  in ar9003_hw_bb_watchdog_config()
2130 	ah->bb_watchdog_last_status = REG_READ(ah, AR_PHY_WATCHDOG_STATUS);  in ar9003_hw_bb_watchdog_read()
2164 		REG_READ(ah, AR_PHY_WATCHDOG_CTL_1),  in ar9003_hw_bb_watchdog_dbg_info()
2165 		REG_READ(ah, AR_PHY_WATCHDOG_CTL_2));  in ar9003_hw_bb_watchdog_dbg_info()
2167 		REG_READ(ah, AR_PHY_GEN_CTRL));  in ar9003_hw_bb_watchdog_dbg_info()
2193 		val = REG_READ(ah, AR_PHY_RESTART);  in ar9003_hw_disable_phy_restart()