2977 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ath9k_hw_ar9300_get_eeprom()  local
2987 		return le16_to_cpu(pBase->regDmn[0]);  in ath9k_hw_ar9300_get_eeprom()
2989 		return pBase->deviceCap;  in ath9k_hw_ar9300_get_eeprom()
2991 		return pBase->opCapFlags.opFlags;  in ath9k_hw_ar9300_get_eeprom()
2993 		return pBase->rfSilent;  in ath9k_hw_ar9300_get_eeprom()
2995 		return (pBase->txrxMask >> 4) & 0xf;  in ath9k_hw_ar9300_get_eeprom()
2997 		return pBase->txrxMask & 0xf;  in ath9k_hw_ar9300_get_eeprom()
2999 		return !!(pBase->featureEnable & BIT(5));  in ath9k_hw_ar9300_get_eeprom()
3001 		return (pBase->miscConfiguration >> 0x3) & 0x1;  in ath9k_hw_ar9300_get_eeprom()
3443 	struct ar9300_base_eep_hdr *pBase;  in ar9003_dump_cal_data()  local
3449 	pBase = &eep->baseEepHeader;  in ar9003_dump_cal_data()
3457 		if (!((pBase->txrxMask >> i) & 1))  in ar9003_dump_cal_data()
3497 	struct ar9300_base_eep_hdr *pBase;  in ath9k_hw_ar9003_dump_eeprom()  local
3519 	pBase = &eep->baseEepHeader;  in ath9k_hw_ar9003_dump_eeprom()
3522 	PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0]));  in ath9k_hw_ar9003_dump_eeprom()
3523 	PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1]));  in ath9k_hw_ar9003_dump_eeprom()
3524 	PR_EEP("TX Mask", (pBase->txrxMask >> 4));  in ath9k_hw_ar9003_dump_eeprom()
3525 	PR_EEP("RX Mask", (pBase->txrxMask & 0x0f));  in ath9k_hw_ar9003_dump_eeprom()
3526 	PR_EEP("Allow 5GHz", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3528 	PR_EEP("Allow 2GHz", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3530 	PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3532 	PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3534 	PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3536 	PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags &  in ath9k_hw_ar9003_dump_eeprom()
3538 	PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc &  in ath9k_hw_ar9003_dump_eeprom()
3540 	PR_EEP("RF Silent", pBase->rfSilent);  in ath9k_hw_ar9003_dump_eeprom()
3541 	PR_EEP("BT option", pBase->blueToothOptions);  in ath9k_hw_ar9003_dump_eeprom()
3542 	PR_EEP("Device Cap", pBase->deviceCap);  in ath9k_hw_ar9003_dump_eeprom()
3543 	PR_EEP("Device Type", pBase->deviceType);  in ath9k_hw_ar9003_dump_eeprom()
3544 	PR_EEP("Power Table Offset", pBase->pwrTableOffset);  in ath9k_hw_ar9003_dump_eeprom()
3545 	PR_EEP("Tuning Caps1", pBase->params_for_tuning_caps[0]);  in ath9k_hw_ar9003_dump_eeprom()
3546 	PR_EEP("Tuning Caps2", pBase->params_for_tuning_caps[1]);  in ath9k_hw_ar9003_dump_eeprom()
3547 	PR_EEP("Enable Tx Temp Comp", !!(pBase->featureEnable & BIT(0)));  in ath9k_hw_ar9003_dump_eeprom()
3548 	PR_EEP("Enable Tx Volt Comp", !!(pBase->featureEnable & BIT(1)));  in ath9k_hw_ar9003_dump_eeprom()
3549 	PR_EEP("Enable fast clock", !!(pBase->featureEnable & BIT(2)));  in ath9k_hw_ar9003_dump_eeprom()
3550 	PR_EEP("Enable doubling", !!(pBase->featureEnable & BIT(3)));  in ath9k_hw_ar9003_dump_eeprom()
3551 	PR_EEP("Internal regulator", !!(pBase->featureEnable & BIT(4)));  in ath9k_hw_ar9003_dump_eeprom()
3552 	PR_EEP("Enable Paprd", !!(pBase->featureEnable & BIT(5)));  in ath9k_hw_ar9003_dump_eeprom()
3553 	PR_EEP("Driver Strength", !!(pBase->miscConfiguration & BIT(0)));  in ath9k_hw_ar9003_dump_eeprom()
3554 	PR_EEP("Quick Drop", !!(pBase->miscConfiguration & BIT(1)));  in ath9k_hw_ar9003_dump_eeprom()
3555 	PR_EEP("Chain mask Reduce", (pBase->miscConfiguration >> 0x3) & 0x1);  in ath9k_hw_ar9003_dump_eeprom()
3556 	PR_EEP("Write enable Gpio", pBase->eepromWriteEnableGpio);  in ath9k_hw_ar9003_dump_eeprom()
3557 	PR_EEP("WLAN Disable Gpio", pBase->wlanDisableGpio);  in ath9k_hw_ar9003_dump_eeprom()
3558 	PR_EEP("WLAN LED Gpio", pBase->wlanLedGpio);  in ath9k_hw_ar9003_dump_eeprom()
3559 	PR_EEP("Rx Band Select Gpio", pBase->rxBandSelectGpio);  in ath9k_hw_ar9003_dump_eeprom()
3560 	PR_EEP("Tx Gain", pBase->txrxgain >> 4);  in ath9k_hw_ar9003_dump_eeprom()
3561 	PR_EEP("Rx Gain", pBase->txrxgain & 0xf);  in ath9k_hw_ar9003_dump_eeprom()
3562 	PR_EEP("SW Reg", le32_to_cpu(pBase->swreg));  in ath9k_hw_ar9003_dump_eeprom()
3798 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_drive_strength_apply()  local
3802 	drive_strength = pBase->miscConfiguration & BIT(0);  in ar9003_hw_drive_strength_apply()
3955 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_internal_regulator_apply()  local
3958 	if (pBase->featureEnable & BIT(4)) {  in ar9003_hw_internal_regulator_apply()
4003 			reg_val = le32_to_cpu(pBase->swreg);  in ar9003_hw_internal_regulator_apply()
4010 			reg_val = le32_to_cpu(pBase->swreg);  in ar9003_hw_internal_regulator_apply()
4067 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_quick_drop_apply()  local
4071 	if (!(pBase->miscConfiguration & BIT(4)))  in ar9003_hw_quick_drop_apply()
4148 	struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;  in ar9003_hw_get_thermometer()  local
4149 	int thermometer =  (pBase->miscConfiguration >> 1) & 0x3;  in ar9003_hw_get_thermometer()