3251 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_tx_lock()
3272 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_tx_unlock()
3292 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_tx_lock()
3303 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_tx_unlock()
3323 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_handle_tx_pause()
3368 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_handle_tx_pause_vdev()
3373 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_handle_tx_pause_vdev()
3407 	if (ar->htt.target_version_major < 3 &&  in ath10k_mac_tx_h_get_txmode()
3557 	return (ar->htt.target_version_major >= 3 &&  in ath10k_mac_tx_frm_has_freq()
3558 		ar->htt.target_version_minor >= 4 &&  in ath10k_mac_tx_frm_has_freq()
3600 		else if (ar->htt.target_version_major >= 3)  in ath10k_mac_tx_h_get_txpath()
3614 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_tx_submit()  local
3619 		ret = ath10k_htt_tx(htt, txmode, skb);  in ath10k_mac_tx_submit()
3622 		ret = ath10k_htt_mgmt_tx(htt, skb);  in ath10k_mac_tx_submit()
3890 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_txq_unref()
3891 	idr_for_each_entry(&ar->htt.pending_tx, msdu, msdu_id) {  in ath10k_mac_txq_unref()
3896 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_txq_unref()
3930 	if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH)  in ath10k_mac_tx_can_push()
3933 	if (ar->htt.num_pending_tx < ar->htt.tx_q_state.num_push_allowed)  in ath10k_mac_tx_can_push()
3946 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_tx_push_txq()  local
3958 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
3959 	ret = ath10k_htt_tx_inc_pending(htt);  in ath10k_mac_tx_push_txq()
3960 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
3967 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
3968 		ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
3969 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
3985 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
3986 		ret = ath10k_htt_tx_mgmt_inc_pending(htt, is_mgmt, is_presp);  in ath10k_mac_tx_push_txq()
3989 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
3990 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
3993 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4000 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4001 		ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4003 			ath10k_htt_tx_mgmt_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4004 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4009 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4011 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4025 	if (ar->htt.num_pending_tx >= (ar->htt.max_num_pending_tx / 2))  in ath10k_mac_tx_push_pending()
4232 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_op_tx()  local
4254 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4257 		ret = ath10k_htt_tx_inc_pending(htt);  in ath10k_mac_op_tx()
4261 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4266 		ret = ath10k_htt_tx_mgmt_inc_pending(htt, is_mgmt, is_presp);  in ath10k_mac_op_tx()
4270 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_op_tx()
4271 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4275 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4282 			spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4283 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_op_tx()
4285 				ath10k_htt_tx_mgmt_dec_pending(htt);  in ath10k_mac_op_tx()
4286 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
5271 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_add_interface()
5274 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_add_interface()
5402 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_remove_interface()
5404 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_remove_interface()
6789 	time_left = wait_event_timeout(ar->htt.empty_tx_wq, ({  in ath10k_flush()
6792 			spin_lock_bh(&ar->htt.tx_lock);  in ath10k_flush()
6793 			empty = (ar->htt.num_pending_tx == 0);  in ath10k_flush()
6794 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_flush()