Lines Matching refs:MISSING
932 #define MISSING 0 macro
939 #define RESET_CONTROL_MBOX_RST_MASK MISSING
963 #define MBOX_BASE_ADDRESS MISSING
964 #define INT_STATUS_ENABLE_ERROR_LSB MISSING
965 #define INT_STATUS_ENABLE_ERROR_MASK MISSING
966 #define INT_STATUS_ENABLE_CPU_LSB MISSING
967 #define INT_STATUS_ENABLE_CPU_MASK MISSING
968 #define INT_STATUS_ENABLE_COUNTER_LSB MISSING
969 #define INT_STATUS_ENABLE_COUNTER_MASK MISSING
970 #define INT_STATUS_ENABLE_MBOX_DATA_LSB MISSING
971 #define INT_STATUS_ENABLE_MBOX_DATA_MASK MISSING
972 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB MISSING
973 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK MISSING
974 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB MISSING
975 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK MISSING
976 #define COUNTER_INT_STATUS_ENABLE_BIT_LSB MISSING
977 #define COUNTER_INT_STATUS_ENABLE_BIT_MASK MISSING
978 #define INT_STATUS_ENABLE_ADDRESS MISSING
979 #define CPU_INT_STATUS_ENABLE_BIT_LSB MISSING
980 #define CPU_INT_STATUS_ENABLE_BIT_MASK MISSING
981 #define HOST_INT_STATUS_ADDRESS MISSING
982 #define CPU_INT_STATUS_ADDRESS MISSING
983 #define ERROR_INT_STATUS_ADDRESS MISSING
984 #define ERROR_INT_STATUS_WAKEUP_MASK MISSING
985 #define ERROR_INT_STATUS_WAKEUP_LSB MISSING
986 #define ERROR_INT_STATUS_RX_UNDERFLOW_MASK MISSING
987 #define ERROR_INT_STATUS_RX_UNDERFLOW_LSB MISSING
988 #define ERROR_INT_STATUS_TX_OVERFLOW_MASK MISSING
989 #define ERROR_INT_STATUS_TX_OVERFLOW_LSB MISSING
990 #define COUNT_DEC_ADDRESS MISSING
991 #define HOST_INT_STATUS_CPU_MASK MISSING
992 #define HOST_INT_STATUS_CPU_LSB MISSING
993 #define HOST_INT_STATUS_ERROR_MASK MISSING
994 #define HOST_INT_STATUS_ERROR_LSB MISSING
995 #define HOST_INT_STATUS_COUNTER_MASK MISSING
996 #define HOST_INT_STATUS_COUNTER_LSB MISSING
997 #define RX_LOOKAHEAD_VALID_ADDRESS MISSING
998 #define WINDOW_DATA_ADDRESS MISSING
999 #define WINDOW_READ_ADDR_ADDRESS MISSING
1000 #define WINDOW_WRITE_ADDR_ADDRESS MISSING