Lines Matching refs:ce_ctrl_addr
159 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_write_index_set() argument
162 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_set()
167 u32 ce_ctrl_addr) in ath10k_ce_dest_ring_write_index_get() argument
169 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_get()
174 u32 ce_ctrl_addr, in ath10k_ce_src_ring_write_index_set() argument
177 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_set()
182 u32 ce_ctrl_addr) in ath10k_ce_src_ring_write_index_get() argument
184 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_get()
197 u32 ce_ctrl_addr) in ath10k_ce_src_ring_read_index_get() argument
200 u32 ce_id = COPY_ENGINE_ID(ce_ctrl_addr); in ath10k_ce_src_ring_read_index_get()
208 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_read_index_get()
231 u32 ce_ctrl_addr, in ath10k_ce_src_ring_base_addr_set() argument
234 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_base_addr_set()
239 u32 ce_ctrl_addr, in ath10k_ce_src_ring_size_set() argument
242 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_size_set()
247 u32 ce_ctrl_addr, in ath10k_ce_src_ring_dmax_set() argument
252 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_dmax_set()
255 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_dmax_set()
261 u32 ce_ctrl_addr, in ath10k_ce_src_ring_byte_swap_set() argument
266 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_byte_swap_set()
269 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_byte_swap_set()
275 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_byte_swap_set() argument
280 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_byte_swap_set()
283 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_dest_ring_byte_swap_set()
298 u32 ce_ctrl_addr) in ath10k_ce_dest_ring_read_index_get() argument
301 u32 ce_id = COPY_ENGINE_ID(ce_ctrl_addr); in ath10k_ce_dest_ring_read_index_get()
309 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_read_index_get()
316 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_base_addr_set() argument
319 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_base_addr_set()
324 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_size_set() argument
327 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_size_set()
332 u32 ce_ctrl_addr, in ath10k_ce_src_ring_highmark_set() argument
336 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_highmark_set()
338 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_highmark_set()
344 u32 ce_ctrl_addr, in ath10k_ce_src_ring_lowmark_set() argument
348 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_lowmark_set()
350 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_lowmark_set()
356 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_highmark_set() argument
360 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_highmark_set()
362 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_highmark_set()
368 u32 ce_ctrl_addr, in ath10k_ce_dest_ring_lowmark_set() argument
372 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_lowmark_set()
374 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_lowmark_set()
380 u32 ce_ctrl_addr) in ath10k_ce_copy_complete_inter_enable() argument
384 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_inter_enable()
387 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_inter_enable()
392 u32 ce_ctrl_addr) in ath10k_ce_copy_complete_intr_disable() argument
396 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_intr_disable()
399 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_intr_disable()
404 u32 ce_ctrl_addr) in ath10k_ce_watermark_intr_disable() argument
408 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_watermark_intr_disable()
411 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_watermark_intr_disable()
416 u32 ce_ctrl_addr) in ath10k_ce_error_intr_enable() argument
420 u32 misc_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_error_intr_enable()
424 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_enable()
429 u32 ce_ctrl_addr) in ath10k_ce_error_intr_disable() argument
434 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr); in ath10k_ce_error_intr_disable()
437 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_disable()
442 u32 ce_ctrl_addr, in ath10k_ce_engine_int_status_clear() argument
447 ath10k_ce_write32(ar, ce_ctrl_addr + wm_regs->addr, mask); in ath10k_ce_engine_int_status_clear()