Lines Matching refs:ar

62 static inline u32 shadow_sr_wr_ind_addr(struct ath10k *ar,  in shadow_sr_wr_ind_addr()  argument
85 ath10k_warn(ar, "invalid CE id: %d", ce_id); in shadow_sr_wr_ind_addr()
91 static inline u32 shadow_dst_wr_ind_addr(struct ath10k *ar, in shadow_dst_wr_ind_addr() argument
123 ath10k_warn(ar, "invalid CE id: %d", ce_id); in shadow_dst_wr_ind_addr()
144 static inline u32 ath10k_ce_read32(struct ath10k *ar, u32 offset) in ath10k_ce_read32() argument
146 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_read32()
148 return ce->bus_ops->read32(ar, offset); in ath10k_ce_read32()
151 static inline void ath10k_ce_write32(struct ath10k *ar, u32 offset, u32 value) in ath10k_ce_write32() argument
153 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_write32()
155 ce->bus_ops->write32(ar, offset, value); in ath10k_ce_write32()
158 static inline void ath10k_ce_dest_ring_write_index_set(struct ath10k *ar, in ath10k_ce_dest_ring_write_index_set() argument
162 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_set()
163 ar->hw_ce_regs->dst_wr_index_addr, n); in ath10k_ce_dest_ring_write_index_set()
166 static inline u32 ath10k_ce_dest_ring_write_index_get(struct ath10k *ar, in ath10k_ce_dest_ring_write_index_get() argument
169 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_get()
170 ar->hw_ce_regs->dst_wr_index_addr); in ath10k_ce_dest_ring_write_index_get()
173 static inline void ath10k_ce_src_ring_write_index_set(struct ath10k *ar, in ath10k_ce_src_ring_write_index_set() argument
177 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_set()
178 ar->hw_ce_regs->sr_wr_index_addr, n); in ath10k_ce_src_ring_write_index_set()
181 static inline u32 ath10k_ce_src_ring_write_index_get(struct ath10k *ar, in ath10k_ce_src_ring_write_index_get() argument
184 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_get()
185 ar->hw_ce_regs->sr_wr_index_addr); in ath10k_ce_src_ring_write_index_get()
188 static inline u32 ath10k_ce_src_ring_read_index_from_ddr(struct ath10k *ar, in ath10k_ce_src_ring_read_index_from_ddr() argument
191 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_src_ring_read_index_from_ddr()
196 static inline u32 ath10k_ce_src_ring_read_index_get(struct ath10k *ar, in ath10k_ce_src_ring_read_index_get() argument
199 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_src_ring_read_index_get()
204 if (ar->hw_params.rri_on_ddr && in ath10k_ce_src_ring_read_index_get()
206 index = ath10k_ce_src_ring_read_index_from_ddr(ar, ce_id); in ath10k_ce_src_ring_read_index_get()
208 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_read_index_get()
209 ar->hw_ce_regs->current_srri_addr); in ath10k_ce_src_ring_read_index_get()
215 ath10k_ce_shadow_src_ring_write_index_set(struct ath10k *ar, in ath10k_ce_shadow_src_ring_write_index_set() argument
219 ath10k_ce_write32(ar, shadow_sr_wr_ind_addr(ar, ce_state), value); in ath10k_ce_shadow_src_ring_write_index_set()
223 ath10k_ce_shadow_dest_ring_write_index_set(struct ath10k *ar, in ath10k_ce_shadow_dest_ring_write_index_set() argument
227 ath10k_ce_write32(ar, shadow_dst_wr_ind_addr(ar, ce_state), value); in ath10k_ce_shadow_dest_ring_write_index_set()
230 static inline void ath10k_ce_src_ring_base_addr_set(struct ath10k *ar, in ath10k_ce_src_ring_base_addr_set() argument
234 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_base_addr_set()
235 ar->hw_ce_regs->sr_base_addr, addr); in ath10k_ce_src_ring_base_addr_set()
238 static inline void ath10k_ce_src_ring_size_set(struct ath10k *ar, in ath10k_ce_src_ring_size_set() argument
242 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_size_set()
243 ar->hw_ce_regs->sr_size_addr, n); in ath10k_ce_src_ring_size_set()
246 static inline void ath10k_ce_src_ring_dmax_set(struct ath10k *ar, in ath10k_ce_src_ring_dmax_set() argument
250 struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar->hw_ce_regs->ctrl1_regs; in ath10k_ce_src_ring_dmax_set()
252 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_dmax_set()
255 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_dmax_set()
260 static inline void ath10k_ce_src_ring_byte_swap_set(struct ath10k *ar, in ath10k_ce_src_ring_byte_swap_set() argument
264 struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar->hw_ce_regs->ctrl1_regs; in ath10k_ce_src_ring_byte_swap_set()
266 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_byte_swap_set()
269 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_byte_swap_set()
274 static inline void ath10k_ce_dest_ring_byte_swap_set(struct ath10k *ar, in ath10k_ce_dest_ring_byte_swap_set() argument
278 struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar->hw_ce_regs->ctrl1_regs; in ath10k_ce_dest_ring_byte_swap_set()
280 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_byte_swap_set()
283 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_dest_ring_byte_swap_set()
289 u32 ath10k_ce_dest_ring_read_index_from_ddr(struct ath10k *ar, u32 ce_id) in ath10k_ce_dest_ring_read_index_from_ddr() argument
291 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_dest_ring_read_index_from_ddr()
297 static inline u32 ath10k_ce_dest_ring_read_index_get(struct ath10k *ar, in ath10k_ce_dest_ring_read_index_get() argument
300 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_dest_ring_read_index_get()
305 if (ar->hw_params.rri_on_ddr && in ath10k_ce_dest_ring_read_index_get()
307 index = ath10k_ce_dest_ring_read_index_from_ddr(ar, ce_id); in ath10k_ce_dest_ring_read_index_get()
309 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_read_index_get()
310 ar->hw_ce_regs->current_drri_addr); in ath10k_ce_dest_ring_read_index_get()
315 static inline void ath10k_ce_dest_ring_base_addr_set(struct ath10k *ar, in ath10k_ce_dest_ring_base_addr_set() argument
319 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_base_addr_set()
320 ar->hw_ce_regs->dr_base_addr, addr); in ath10k_ce_dest_ring_base_addr_set()
323 static inline void ath10k_ce_dest_ring_size_set(struct ath10k *ar, in ath10k_ce_dest_ring_size_set() argument
327 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_size_set()
328 ar->hw_ce_regs->dr_size_addr, n); in ath10k_ce_dest_ring_size_set()
331 static inline void ath10k_ce_src_ring_highmark_set(struct ath10k *ar, in ath10k_ce_src_ring_highmark_set() argument
335 struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar->hw_ce_regs->wm_srcr; in ath10k_ce_src_ring_highmark_set()
336 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_highmark_set()
338 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_highmark_set()
343 static inline void ath10k_ce_src_ring_lowmark_set(struct ath10k *ar, in ath10k_ce_src_ring_lowmark_set() argument
347 struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar->hw_ce_regs->wm_srcr; in ath10k_ce_src_ring_lowmark_set()
348 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_lowmark_set()
350 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_lowmark_set()
355 static inline void ath10k_ce_dest_ring_highmark_set(struct ath10k *ar, in ath10k_ce_dest_ring_highmark_set() argument
359 struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar->hw_ce_regs->wm_dstr; in ath10k_ce_dest_ring_highmark_set()
360 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_highmark_set()
362 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_highmark_set()
367 static inline void ath10k_ce_dest_ring_lowmark_set(struct ath10k *ar, in ath10k_ce_dest_ring_lowmark_set() argument
371 struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar->hw_ce_regs->wm_dstr; in ath10k_ce_dest_ring_lowmark_set()
372 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_lowmark_set()
374 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_lowmark_set()
379 static inline void ath10k_ce_copy_complete_inter_enable(struct ath10k *ar, in ath10k_ce_copy_complete_inter_enable() argument
382 struct ath10k_hw_ce_host_ie *host_ie = ar->hw_ce_regs->host_ie; in ath10k_ce_copy_complete_inter_enable()
384 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_inter_enable()
385 ar->hw_ce_regs->host_ie_addr); in ath10k_ce_copy_complete_inter_enable()
387 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_inter_enable()
391 static inline void ath10k_ce_copy_complete_intr_disable(struct ath10k *ar, in ath10k_ce_copy_complete_intr_disable() argument
394 struct ath10k_hw_ce_host_ie *host_ie = ar->hw_ce_regs->host_ie; in ath10k_ce_copy_complete_intr_disable()
396 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_intr_disable()
397 ar->hw_ce_regs->host_ie_addr); in ath10k_ce_copy_complete_intr_disable()
399 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_intr_disable()
403 static inline void ath10k_ce_watermark_intr_disable(struct ath10k *ar, in ath10k_ce_watermark_intr_disable() argument
406 struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs; in ath10k_ce_watermark_intr_disable()
408 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_watermark_intr_disable()
409 ar->hw_ce_regs->host_ie_addr); in ath10k_ce_watermark_intr_disable()
411 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_watermark_intr_disable()
415 static inline void ath10k_ce_error_intr_enable(struct ath10k *ar, in ath10k_ce_error_intr_enable() argument
418 struct ath10k_hw_ce_misc_regs *misc_regs = ar->hw_ce_regs->misc_regs; in ath10k_ce_error_intr_enable()
420 u32 misc_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_error_intr_enable()
421 ar->hw_ce_regs->misc_ie_addr); in ath10k_ce_error_intr_enable()
423 ath10k_ce_write32(ar, in ath10k_ce_error_intr_enable()
424 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_enable()
428 static inline void ath10k_ce_error_intr_disable(struct ath10k *ar, in ath10k_ce_error_intr_disable() argument
431 struct ath10k_hw_ce_misc_regs *misc_regs = ar->hw_ce_regs->misc_regs; in ath10k_ce_error_intr_disable()
433 u32 misc_ie_addr = ath10k_ce_read32(ar, in ath10k_ce_error_intr_disable()
434 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr); in ath10k_ce_error_intr_disable()
436 ath10k_ce_write32(ar, in ath10k_ce_error_intr_disable()
437 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_disable()
441 static inline void ath10k_ce_engine_int_status_clear(struct ath10k *ar, in ath10k_ce_engine_int_status_clear() argument
445 struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs; in ath10k_ce_engine_int_status_clear()
447 ath10k_ce_write32(ar, ce_ctrl_addr + wm_regs->addr, mask); in ath10k_ce_engine_int_status_clear()
461 struct ath10k *ar = ce_state->ar; in _ath10k_ce_send_nolock() local
472 ath10k_warn(ar, "%s: send more we can (nbytes: %d, max: %d)\n", in _ath10k_ce_send_nolock()
504 if (ar->hw_params.shadow_reg_support) in _ath10k_ce_send_nolock()
505 ath10k_ce_shadow_src_ring_write_index_set(ar, ce_state, in _ath10k_ce_send_nolock()
508 ath10k_ce_src_ring_write_index_set(ar, ctrl_addr, in _ath10k_ce_send_nolock()
524 struct ath10k *ar = ce_state->ar; in _ath10k_ce_send_nolock_64() local
535 if (test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) in _ath10k_ce_send_nolock_64()
539 ath10k_warn(ar, "%s: send more we can (nbytes: %d, max: %d)\n", in _ath10k_ce_send_nolock_64()
542 if (ar->hw_params.rri_on_ddr) in _ath10k_ce_send_nolock_64()
543 sw_index = ath10k_ce_src_ring_read_index_from_ddr(ar, ce_state->id); in _ath10k_ce_send_nolock_64()
585 ath10k_ce_src_ring_write_index_set(ar, ctrl_addr, write_index); in _ath10k_ce_send_nolock_64()
606 struct ath10k *ar = pipe->ar; in __ath10k_ce_send_revert() local
607 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_send_revert()
622 ath10k_ce_src_ring_write_index_get(ar, ctrl_addr))) in __ath10k_ce_send_revert()
639 struct ath10k *ar = ce_state->ar; in ath10k_ce_send() local
640 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_send()
654 struct ath10k *ar = pipe->ar; in ath10k_ce_num_free_src_entries() local
655 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_num_free_src_entries()
670 struct ath10k *ar = pipe->ar; in __ath10k_ce_rx_num_free_bufs() local
671 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_rx_num_free_bufs()
686 struct ath10k *ar = pipe->ar; in __ath10k_ce_rx_post_buf() local
687 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_rx_post_buf()
707 ath10k_ce_dest_ring_write_index_set(ar, ctrl_addr, write_index); in __ath10k_ce_rx_post_buf()
717 struct ath10k *ar = pipe->ar; in __ath10k_ce_rx_post_buf_64() local
718 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_rx_post_buf_64()
740 ath10k_ce_dest_ring_write_index_set(ar, ctrl_addr, write_index); in __ath10k_ce_rx_post_buf_64()
748 struct ath10k *ar = pipe->ar; in ath10k_ce_rx_update_write_idx() local
753 u32 cur_write_idx = ath10k_ce_dest_ring_write_index_get(ar, ctrl_addr); in ath10k_ce_rx_update_write_idx()
762 ath10k_ce_dest_ring_write_index_set(ar, ctrl_addr, write_index); in ath10k_ce_rx_update_write_idx()
770 struct ath10k *ar = pipe->ar; in ath10k_ce_rx_post_buf() local
771 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_rx_post_buf()
899 struct ath10k *ar = ce_state->ar; in ath10k_ce_completed_recv_next() local
900 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_completed_recv_next()
923 struct ath10k *ar; in _ath10k_ce_revoke_recv_next() local
931 ar = ce_state->ar; in _ath10k_ce_revoke_recv_next()
932 ce = ath10k_ce_priv(ar); in _ath10k_ce_revoke_recv_next()
976 struct ath10k *ar; in _ath10k_ce_revoke_recv_next_64() local
984 ar = ce_state->ar; in _ath10k_ce_revoke_recv_next_64()
985 ce = ath10k_ce_priv(ar); in _ath10k_ce_revoke_recv_next_64()
1040 struct ath10k *ar = ce_state->ar; in ath10k_ce_completed_send_next_nolock() local
1055 read_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in ath10k_ce_completed_send_next_nolock()
1063 if (ar->hw_params.rri_on_ddr) in ath10k_ce_completed_send_next_nolock()
1064 read_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in ath10k_ce_completed_send_next_nolock()
1089 static void ath10k_ce_extract_desc_data(struct ath10k *ar, in ath10k_ce_extract_desc_data() argument
1106 static void ath10k_ce_extract_desc_data_64(struct ath10k *ar, in ath10k_ce_extract_desc_data_64() argument
1136 struct ath10k *ar; in ath10k_ce_cancel_send_next() local
1144 ar = ce_state->ar; in ath10k_ce_cancel_send_next()
1145 ce = ath10k_ce_priv(ar); in ath10k_ce_cancel_send_next()
1154 ce_state->ops->ce_extract_desc_data(ar, src_ring, sw_index, in ath10k_ce_cancel_send_next()
1182 struct ath10k *ar = ce_state->ar; in ath10k_ce_completed_send_next() local
1183 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_completed_send_next()
1201 void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_per_engine_service() argument
1203 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_per_engine_service()
1205 struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs; in ath10k_ce_per_engine_service()
1211 ath10k_ce_engine_int_status_clear(ar, ctrl_addr, in ath10k_ce_per_engine_service()
1228 ath10k_ce_engine_int_status_clear(ar, ctrl_addr, wm_regs->wm_mask); in ath10k_ce_per_engine_service()
1240 void ath10k_ce_per_engine_service_any(struct ath10k *ar) in ath10k_ce_per_engine_service_any() argument
1245 intr_summary = ath10k_ce_interrupt_summary(ar); in ath10k_ce_per_engine_service_any()
1254 ath10k_ce_per_engine_service(ar, ce_id); in ath10k_ce_per_engine_service_any()
1269 struct ath10k *ar = ce_state->ar; in ath10k_ce_per_engine_handler_adjust() local
1274 ath10k_ce_copy_complete_inter_enable(ar, ctrl_addr); in ath10k_ce_per_engine_handler_adjust()
1276 ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr); in ath10k_ce_per_engine_handler_adjust()
1278 ath10k_ce_watermark_intr_disable(ar, ctrl_addr); in ath10k_ce_per_engine_handler_adjust()
1281 int ath10k_ce_disable_interrupts(struct ath10k *ar) in ath10k_ce_disable_interrupts() argument
1286 u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_disable_interrupts()
1288 ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr); in ath10k_ce_disable_interrupts()
1289 ath10k_ce_error_intr_disable(ar, ctrl_addr); in ath10k_ce_disable_interrupts()
1290 ath10k_ce_watermark_intr_disable(ar, ctrl_addr); in ath10k_ce_disable_interrupts()
1297 void ath10k_ce_enable_interrupts(struct ath10k *ar) in ath10k_ce_enable_interrupts() argument
1299 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_enable_interrupts()
1313 static int ath10k_ce_init_src_ring(struct ath10k *ar, in ath10k_ce_init_src_ring() argument
1317 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_init_src_ring()
1320 u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_init_src_ring()
1324 if (ar->hw_params.target_64bit) in ath10k_ce_init_src_ring()
1331 src_ring->sw_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in ath10k_ce_init_src_ring()
1336 ath10k_ce_src_ring_write_index_get(ar, ctrl_addr); in ath10k_ce_init_src_ring()
1339 ath10k_ce_src_ring_base_addr_set(ar, ctrl_addr, in ath10k_ce_init_src_ring()
1341 ath10k_ce_src_ring_size_set(ar, ctrl_addr, nentries); in ath10k_ce_init_src_ring()
1342 ath10k_ce_src_ring_dmax_set(ar, ctrl_addr, attr->src_sz_max); in ath10k_ce_init_src_ring()
1343 ath10k_ce_src_ring_byte_swap_set(ar, ctrl_addr, 0); in ath10k_ce_init_src_ring()
1344 ath10k_ce_src_ring_lowmark_set(ar, ctrl_addr, 0); in ath10k_ce_init_src_ring()
1345 ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, nentries); in ath10k_ce_init_src_ring()
1347 ath10k_dbg(ar, ATH10K_DBG_BOOT, in ath10k_ce_init_src_ring()
1354 static int ath10k_ce_init_dest_ring(struct ath10k *ar, in ath10k_ce_init_dest_ring() argument
1358 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_init_dest_ring()
1361 u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_init_dest_ring()
1365 if (ar->hw_params.target_64bit) in ath10k_ce_init_dest_ring()
1372 dest_ring->sw_index = ath10k_ce_dest_ring_read_index_get(ar, ctrl_addr); in ath10k_ce_init_dest_ring()
1375 ath10k_ce_dest_ring_write_index_get(ar, ctrl_addr); in ath10k_ce_init_dest_ring()
1378 ath10k_ce_dest_ring_base_addr_set(ar, ctrl_addr, in ath10k_ce_init_dest_ring()
1380 ath10k_ce_dest_ring_size_set(ar, ctrl_addr, nentries); in ath10k_ce_init_dest_ring()
1381 ath10k_ce_dest_ring_byte_swap_set(ar, ctrl_addr, 0); in ath10k_ce_init_dest_ring()
1382 ath10k_ce_dest_ring_lowmark_set(ar, ctrl_addr, 0); in ath10k_ce_init_dest_ring()
1383 ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, nentries); in ath10k_ce_init_dest_ring()
1385 ath10k_dbg(ar, ATH10K_DBG_BOOT, in ath10k_ce_init_dest_ring()
1392 static int ath10k_ce_alloc_shadow_base(struct ath10k *ar, in ath10k_ce_alloc_shadow_base() argument
1409 ath10k_ce_alloc_src_ring(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_src_ring() argument
1434 dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_src_ring()
1452 if (ar->hw_params.shadow_reg_support) { in ath10k_ce_alloc_src_ring()
1453 ret = ath10k_ce_alloc_shadow_base(ar, src_ring, nentries); in ath10k_ce_alloc_src_ring()
1455 dma_free_coherent(ar->dev, in ath10k_ce_alloc_src_ring()
1469 ath10k_ce_alloc_src_ring_64(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_src_ring_64() argument
1493 dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_src_ring_64()
1511 if (ar->hw_params.shadow_reg_support) { in ath10k_ce_alloc_src_ring_64()
1512 ret = ath10k_ce_alloc_shadow_base(ar, src_ring, nentries); in ath10k_ce_alloc_src_ring_64()
1514 dma_free_coherent(ar->dev, in ath10k_ce_alloc_src_ring_64()
1528 ath10k_ce_alloc_dest_ring(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_dest_ring() argument
1552 dma_zalloc_coherent(ar->dev, in ath10k_ce_alloc_dest_ring()
1574 ath10k_ce_alloc_dest_ring_64(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_dest_ring_64() argument
1597 dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_dest_ring_64()
1631 int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_init_pipe() argument
1637 ret = ath10k_ce_init_src_ring(ar, ce_id, attr); in ath10k_ce_init_pipe()
1639 ath10k_err(ar, "Failed to initialize CE src ring for ID: %d (%d)\n", in ath10k_ce_init_pipe()
1646 ret = ath10k_ce_init_dest_ring(ar, ce_id, attr); in ath10k_ce_init_pipe()
1648 ath10k_err(ar, "Failed to initialize CE dest ring for ID: %d (%d)\n", in ath10k_ce_init_pipe()
1658 static void ath10k_ce_deinit_src_ring(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_deinit_src_ring() argument
1660 u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_deinit_src_ring()
1662 ath10k_ce_src_ring_base_addr_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_src_ring()
1663 ath10k_ce_src_ring_size_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_src_ring()
1664 ath10k_ce_src_ring_dmax_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_src_ring()
1665 ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_src_ring()
1668 static void ath10k_ce_deinit_dest_ring(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_deinit_dest_ring() argument
1670 u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_deinit_dest_ring()
1672 ath10k_ce_dest_ring_base_addr_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_dest_ring()
1673 ath10k_ce_dest_ring_size_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_dest_ring()
1674 ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_dest_ring()
1677 void ath10k_ce_deinit_pipe(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_deinit_pipe() argument
1679 ath10k_ce_deinit_src_ring(ar, ce_id); in ath10k_ce_deinit_pipe()
1680 ath10k_ce_deinit_dest_ring(ar, ce_id); in ath10k_ce_deinit_pipe()
1684 static void _ath10k_ce_free_pipe(struct ath10k *ar, int ce_id) in _ath10k_ce_free_pipe() argument
1686 struct ath10k_ce *ce = ath10k_ce_priv(ar); in _ath10k_ce_free_pipe()
1690 if (ar->hw_params.shadow_reg_support) in _ath10k_ce_free_pipe()
1692 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe()
1702 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe()
1715 static void _ath10k_ce_free_pipe_64(struct ath10k *ar, int ce_id) in _ath10k_ce_free_pipe_64() argument
1717 struct ath10k_ce *ce = ath10k_ce_priv(ar); in _ath10k_ce_free_pipe_64()
1721 if (ar->hw_params.shadow_reg_support) in _ath10k_ce_free_pipe_64()
1723 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe_64()
1733 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe_64()
1746 void ath10k_ce_free_pipe(struct ath10k *ar, int ce_id) in ath10k_ce_free_pipe() argument
1748 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_free_pipe()
1751 ce_state->ops->ce_free_pipe(ar, ce_id); in ath10k_ce_free_pipe()
1755 void ath10k_ce_dump_registers(struct ath10k *ar, in ath10k_ce_dump_registers() argument
1758 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_dump_registers()
1762 lockdep_assert_held(&ar->data_lock); in ath10k_ce_dump_registers()
1764 ath10k_err(ar, "Copy Engine register dump:\n"); in ath10k_ce_dump_registers()
1768 addr = ath10k_ce_base_address(ar, id); in ath10k_ce_dump_registers()
1772 cpu_to_le32(ath10k_ce_src_ring_write_index_get(ar, addr)); in ath10k_ce_dump_registers()
1774 cpu_to_le32(ath10k_ce_src_ring_read_index_get(ar, addr)); in ath10k_ce_dump_registers()
1776 cpu_to_le32(ath10k_ce_dest_ring_write_index_get(ar, addr)); in ath10k_ce_dump_registers()
1778 cpu_to_le32(ath10k_ce_dest_ring_read_index_get(ar, addr)); in ath10k_ce_dump_registers()
1783 ath10k_err(ar, "[%02d]: 0x%08x %3u %3u %3u %3u", id, in ath10k_ce_dump_registers()
1818 static void ath10k_ce_set_ops(struct ath10k *ar, in ath10k_ce_set_ops() argument
1821 switch (ar->hw_rev) { in ath10k_ce_set_ops()
1831 int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id, in ath10k_ce_alloc_pipe() argument
1834 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_alloc_pipe()
1838 ath10k_ce_set_ops(ar, ce_state); in ath10k_ce_alloc_pipe()
1851 ce_state->ar = ar; in ath10k_ce_alloc_pipe()
1853 ce_state->ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_alloc_pipe()
1865 ce_state->ops->ce_alloc_src_ring(ar, ce_id, attr); in ath10k_ce_alloc_pipe()
1868 ath10k_err(ar, "failed to alloc CE src ring %d: %d\n", in ath10k_ce_alloc_pipe()
1876 ce_state->dest_ring = ce_state->ops->ce_alloc_dst_ring(ar, in ath10k_ce_alloc_pipe()
1881 ath10k_err(ar, "failed to alloc CE dest ring %d: %d\n", in ath10k_ce_alloc_pipe()
1892 void ath10k_ce_alloc_rri(struct ath10k *ar) in ath10k_ce_alloc_rri() argument
1898 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_alloc_rri()
1900 ce->vaddr_rri = dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_rri()
1907 ath10k_ce_write32(ar, ar->hw_ce_regs->ce_rri_low, in ath10k_ce_alloc_rri()
1909 ath10k_ce_write32(ar, ar->hw_ce_regs->ce_rri_high, in ath10k_ce_alloc_rri()
1914 ctrl1_regs = ar->hw_ce_regs->ctrl1_regs->addr; in ath10k_ce_alloc_rri()
1915 ce_base_addr = ath10k_ce_base_address(ar, i); in ath10k_ce_alloc_rri()
1916 value = ath10k_ce_read32(ar, ce_base_addr + ctrl1_regs); in ath10k_ce_alloc_rri()
1917 value |= ar->hw_ce_regs->upd->mask; in ath10k_ce_alloc_rri()
1918 ath10k_ce_write32(ar, ce_base_addr + ctrl1_regs, value); in ath10k_ce_alloc_rri()
1925 void ath10k_ce_free_rri(struct ath10k *ar) in ath10k_ce_free_rri() argument
1927 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_free_rri()
1929 dma_free_coherent(ar->dev, (CE_COUNT * sizeof(u32)), in ath10k_ce_free_rri()