Lines Matching refs:movel
129 movel \src, PLX_DMA_0_PCI
130 movel \dest, PLX_DMA_0_LOCAL
131 movel \len, PLX_DMA_0_LENGTH
132 movel #0x0103, PLX_DMA_CMD_STS // start channel 0 transfer
139 movel \src, PLX_DMA_1_LOCAL
140 movel \dest, PLX_DMA_1_PCI
141 movel \len, PLX_DMA_1_LENGTH
142 movel #0x0301, PLX_DMA_CMD_STS // start channel 1 transfer
149 movel %d7, -(%sp) // src and dest must be < 256 MB
150 movel \len, %d7 // bits 0 and 1
155 98: movel (\src)+, (\dest)+
157 99: movel %d7, \len
165 movel (%sp)+, %d7
199 movel OR1, %d0
202 movel %d0, OR1
214 movel #pci9060_interrupt, PCI9060_VECTOR
215 movel #error_interrupt, ERROR_VECTOR
216 movel #port_interrupt_1, SCC1_VECTOR
217 movel #port_interrupt_2, SCC2_VECTOR
218 movel #port_interrupt_3, SCC3_VECTOR
219 movel #port_interrupt_4, SCC4_VECTOR
220 movel #timer_interrupt, TIMER_IRQ * 4
222 movel #0x78000000, CIMR // only SCCx IRQs from CPM
227 movel #0xD41F40 + (CPM_IRQ_LEVEL << 13), CICR
228 movel #0x543, PLX_DMA_0_MODE // 32-bit, Ready, Burst, IRQ
229 movel #0x543, PLX_DMA_1_MODE
230 movel #0x0, PLX_DMA_0_DESC // from PCI to local
231 movel #0x8, PLX_DMA_1_DESC // from local to PCI
232 movel #0x101, PLX_DMA_CMD_STS // enable both DMA channels
239 movel #1, PLX_MAILBOX_5 // non-zero value = init complete
250 main: movel channel_stats, %d7 // D7 = doorbell + irq status
286 movel %d6, PLX_DOORBELL_FROM_CARD // signal the host
293 movel ch_status_addr(%d0), %a0 // A0 = port status address
296 movel #1, STATUS_OPEN(%a0) // confirm the port is open
303 movel SICR, %d1 // D1 = clock settings in SICR
313 movel %d1, SICR // update clock settings in SICR
319 movel first_buffer(%d0), %d1 // D1 = starting buffer address
320 movel tx_first_bd(%d0), %a1 // A1 = starting TX BD address
321 movel #TX_BUFFERS - 2, %d2 // D2 = TX_BUFFERS - 1 counter
322 movel #0x18000000, %d3 // D3 = initial TX BD flags: Int + Last
327 movel %d3, (%a1)+ // TX flags + length
328 movel %d1, (%a1)+ // buffer address
333 movel %d3, (%a1)+ // Final TX flags + length
334 movel %d1, (%a1)+ // buffer address
337 movel #RX_BUFFERS - 2, %d2 // D2 = RX_BUFFERS - 1 counter
339 movel #0x90000000, (%a1)+ // RX flags + length
340 movel %d1, (%a1)+ // buffer address
344 movel #0xB0000000, (%a1)+ // Final RX flags + length
345 movel %d1, (%a1)+ // buffer address
348 movel scc_base_addr(%d0), %a1 // A1 = SCC_BASE address
349 movel scc_reg_addr(%d0), %a2 // A2 = SCC_REGS address
351 movel #0xFFFF, SCC_SCCE(%a2) // clear status bits
352 movel #0x0000, SCC_SCCM(%a2) // interrupt mask
354 movel tx_first_bd(%d0), %d1
365 movel #0xF0B8, SCC_C_MASK(%a1)
366 movel #0xFFFF, SCC_C_PRES(%a1)
375 movel #0xDEBB20E3, SCC_C_MASK(%a1)
376 movel #0xFFFFFFFF, SCC_C_PRES(%a1)
385 movel #0xF0B8, SCC_C_MASK(%a1)
395 movel #0xDEBB20E3, SCC_C_MASK(%a1)
403 movel #0xF0B8, SCC_C_MASK(%a1)
404 movel #0xFFFF, SCC_C_PRES(%a1)
409 movel #0x00000003, SCC_GSMR_H(%a2) // RTSM
412 movel #0x10040900, SCC_GSMR_L(%a2) // NRZI: TCI Tend RECN+TENC=1
416 movel #0x10040000, SCC_GSMR_L(%a2) // NRZ: TCI Tend RECN+TENC=0
419 movel %d0, %d1
435 movel scc_reg_addr(%d0), %a0 // A0 = SCC_REGS address
442 movel ch_status_addr(%d0), %d1
453 movel tx_out(%d0), %d1
454 movel %d1, %d2 // D1 = D2 = tx_out BD# = desc#
462 movel 4(%d2), %a0 // PCI address
466 movel 4(%d1), %a1 // A1 = dest address
467 movel 8(%d2), %d2 // D2 = length
473 movel tx_out(%d0), %d1
478 tx_1: movel %d1, tx_out(%d0)
489 rx: movel rx_in(%d0), %d1 // D1 = rx_in BD#
513 movel rx_out, %d2
519 movel %d3, 8(%d2)
520 movel 4(%d1), %a0 // A0 = source address
521 movel 4(%d2), %a1
526 movel packet_full(%d0), (%d2) // update desc stat
530 movel rx_out, %d2
535 rx_1: movel %d2, rx_out
541 movel rx_in(%d0), %d1
546 rx_2: movel %d1, rx_in(%d0)
550 movel ch_status_addr(%d0), %d2
555 movel ch_status_addr(%d0), %d2
568 movel tx_in(%d0), %d1
569 movel %d1, %d2 // D1 = D2 = tx_in BD# = desc#
579 movel tx_in(%d0), %d1
585 movel %d1, tx_in(%d0)
593 movel #PACKET_SENT, (%d2)
597 movel #PACKET_UNDERRUN, (%d2)
608 movel %d0, -(%sp)
611 movel PLX_DMA_CMD_STS, %d0 // do not btst PLX register directly
619 movel %d0, -(%sp)
622 movel PLX_DMA_CMD_STS, %d0 // do not btst PLX register directly
631 movel (%sp)+, %d0
643 movel %d0, -(%sp)
645 movel PLX_DOORBELL_TO_CARD, %d0
646 movel %d0, PLX_DOORBELL_TO_CARD // confirm all requests
649 movel #0x0909, PLX_DMA_CMD_STS // clear DMA ch #0 and #1 interrupts
651 movel (%sp)+, %d0
659 movel #0x40000000, CISR
665 movel #0x20000000, CISR
671 movel #0x10000000, CISR
677 movel #0x08000000, CISR
687 movel %d0, -(%sp)
688 movel %d1, -(%sp)
689 movel %d2, -(%sp)
690 movel %a0, -(%sp)
691 movel %a1, -(%sp)
694 movel #CSRA, %a0 // A0 = CSR address
752 movel ch_status_addr(%d0), %a1
755 movel %d1, STATUS_CABLE(%a1) // update status
756 movel bell_cable(%d0), PLX_DOORBELL_FROM_CARD // signal the host
764 movel (%sp)+, %a1
765 movel (%sp)+, %a0
766 movel (%sp)+, %d2
767 movel (%sp)+, %d1
768 movel (%sp)+, %d0
782 movel #0x12345678, %d1 // D1 = test value
783 movel %d1, (128 * 1024 - 4)
784 movel #128 * 1024, %d0 // D0 = RAM size tested
788 movel %d0, %a0
798 movel %d1, (128 * 1024 - 4)
803 movel %d0, %a0 // A0 = fill ptr
806 movel %d0, %d1 // D1 = DBf counter
808 movel %a0, -(%a0)
826 movel %a0, PLX_MAILBOX_5