Lines Matching refs:REGBASE
90 REGBASE = DPRBASE + 0x1000 define
91 PICR = REGBASE + 0x026 // 16-bit periodic irq control
92 PITR = REGBASE + 0x02A // 16-bit periodic irq timing
93 OR1 = REGBASE + 0x064 // 32-bit RAM bank #1 options
94 CICR = REGBASE + 0x540 // 32(24)-bit CP interrupt config
95 CIMR = REGBASE + 0x548 // 32-bit CP interrupt mask
96 CISR = REGBASE + 0x54C // 32-bit CP interrupts in-service
97 PADIR = REGBASE + 0x550 // 16-bit PortA data direction bitmap
98 PAPAR = REGBASE + 0x552 // 16-bit PortA pin assignment bitmap
99 PAODR = REGBASE + 0x554 // 16-bit PortA open drain bitmap
100 PADAT = REGBASE + 0x556 // 16-bit PortA data register
102 PCDIR = REGBASE + 0x560 // 16-bit PortC data direction bitmap
103 PCPAR = REGBASE + 0x562 // 16-bit PortC pin assignment bitmap
104 PCSO = REGBASE + 0x564 // 16-bit PortC special options
105 PCDAT = REGBASE + 0x566 // 16-bit PortC data register
106 PCINT = REGBASE + 0x568 // 16-bit PortC interrupt control
107 CR = REGBASE + 0x5C0 // 16-bit Command register
109 SCC1_REGS = REGBASE + 0x600
110 SCC2_REGS = REGBASE + 0x620
111 SCC3_REGS = REGBASE + 0x640
112 SCC4_REGS = REGBASE + 0x660
113 SICR = REGBASE + 0x6EC // 32-bit SI clock route