41 	.uf_info = {
84 	struct ucc_fast_info *uf_info;  in uhdlc_init()  local
95 	uf_info = &ut_info->uf_info;  in uhdlc_init()
98 		uf_info->tsa = 1;  in uhdlc_init()
99 		uf_info->ctsp = 1;  in uhdlc_init()
106 		uf_info->brkpt_support = 1;  in uhdlc_init()
108 	uf_info->uccm_mask = ((UCC_HDLC_UCCE_RXB | UCC_HDLC_UCCE_RXF |  in uhdlc_init()
111 	ret = ucc_fast_init(uf_info, &priv->uccf);  in uhdlc_init()
124 		qe_setbrg(ut_info->uf_info.rx_clock, 20000000, 1);  in uhdlc_init()
138 	cecr_subblock = ucc_fast_get_qe_cr_subblock(uf_info->ucc_num);  in uhdlc_init()
221 	cecr_subblock = ucc_fast_get_qe_cr_subblock(uf_info->ucc_num);  in uhdlc_init()
657 		if (request_irq(priv->ut_info->uf_info.irq,  in uhdlc_open()
662 					priv->ut_info->uf_info.ucc_num);  in uhdlc_open()
753 				priv->ut_info->uf_info.ucc_num);  in uhdlc_close()
765 	free_irq(priv->ut_info->uf_info.irq, priv);  in uhdlc_close()
867 	struct ucc_fast_info *uf_info;  in uhdlc_resume()  local
880 	uf_info = &ut_info->uf_info;  in uhdlc_resume()
889 	iowrite16be(uf_info->urfs, &uf_regs->urfs);  in uhdlc_resume()
890 	iowrite16be(uf_info->urfet, &uf_regs->urfet);  in uhdlc_resume()
891 	iowrite16be(uf_info->urfset, &uf_regs->urfset);  in uhdlc_resume()
892 	iowrite16be(uf_info->utfs, &uf_regs->utfs);  in uhdlc_resume()
893 	iowrite16be(uf_info->utfet, &uf_regs->utfet);  in uhdlc_resume()
894 	iowrite16be(uf_info->utftt, &uf_regs->utftt);  in uhdlc_resume()
902 	iowrite32be(uf_info->uccm_mask, &uf_regs->uccm);  in uhdlc_resume()
912 	cecr_subblock = ucc_fast_get_qe_cr_subblock(uf_info->ucc_num);  in uhdlc_resume()
920 	cecr_subblock = ucc_fast_get_qe_cr_subblock(uf_info->ucc_num);  in uhdlc_resume()
958 					priv->ut_info->uf_info.ucc_num);  in uhdlc_resume()
1027 	ut_info->uf_info.ucc_num = ucc_num;  in ucc_hdlc_probe()
1031 		ut_info->uf_info.rx_clock = qe_clock_source(sprop);  in ucc_hdlc_probe()
1032 		if ((ut_info->uf_info.rx_clock < QE_CLK_NONE) ||  in ucc_hdlc_probe()
1033 		    (ut_info->uf_info.rx_clock > QE_CLK24)) {  in ucc_hdlc_probe()
1044 		ut_info->uf_info.tx_clock = qe_clock_source(sprop);  in ucc_hdlc_probe()
1045 		if ((ut_info->uf_info.tx_clock < QE_CLK_NONE) ||  in ucc_hdlc_probe()
1046 		    (ut_info->uf_info.tx_clock > QE_CLK24)) {  in ucc_hdlc_probe()
1059 	ut_info->uf_info.regs = res.start;  in ucc_hdlc_probe()
1060 	ut_info->uf_info.irq = irq_of_parse_and_map(np, 0);  in ucc_hdlc_probe()