Lines Matching refs:dpriv
186 #define SCC_REG_START(dpriv) (SCC_START+(dpriv->dev_id)*SCC_OFFSET) argument
388 static void scc_patchl(u32 mask, u32 value, struct dscc4_dev_priv *dpriv, in scc_patchl() argument
394 state = dpriv->scc_regs[offset >> 2]; in scc_patchl()
397 dpriv->scc_regs[offset >> 2] = state; in scc_patchl()
398 writel(state, dpriv->base_addr + SCC_REG_START(dpriv) + offset); in scc_patchl()
401 static void scc_writel(u32 bits, struct dscc4_dev_priv *dpriv, in scc_writel() argument
408 dpriv->scc_regs[offset >> 2] = bits; in scc_writel()
409 writel(bits, dpriv->base_addr + SCC_REG_START(dpriv) + offset); in scc_writel()
412 static inline u32 scc_readl(struct dscc4_dev_priv *dpriv, int offset) in scc_readl() argument
414 return dpriv->scc_regs[offset >> 2]; in scc_readl()
417 static u32 scc_readl_star(struct dscc4_dev_priv *dpriv, struct net_device *dev) in scc_readl_star() argument
420 readl(dpriv->base_addr + SCC_REG_START(dpriv) + STAR); in scc_readl_star()
421 return readl(dpriv->base_addr + SCC_REG_START(dpriv) + STAR); in scc_readl_star()
424 static inline void dscc4_do_tx(struct dscc4_dev_priv *dpriv, in dscc4_do_tx() argument
427 dpriv->ltda = dpriv->tx_fd_dma + in dscc4_do_tx()
428 ((dpriv->tx_current-1)%TX_RING_SIZE)*sizeof(struct TxFD); in dscc4_do_tx()
429 writel(dpriv->ltda, dpriv->base_addr + CH0LTDA + dpriv->dev_id*4); in dscc4_do_tx()
431 readl(dpriv->base_addr + CH0LTDA + dpriv->dev_id*4); in dscc4_do_tx()
434 static inline void dscc4_rx_update(struct dscc4_dev_priv *dpriv, in dscc4_rx_update() argument
437 dpriv->lrda = dpriv->rx_fd_dma + in dscc4_rx_update()
438 ((dpriv->rx_dirty - 1)%RX_RING_SIZE)*sizeof(struct RxFD); in dscc4_rx_update()
439 writel(dpriv->lrda, dpriv->base_addr + CH0LRDA + dpriv->dev_id*4); in dscc4_rx_update()
442 static inline unsigned int dscc4_tx_done(struct dscc4_dev_priv *dpriv) in dscc4_tx_done() argument
444 return dpriv->tx_current == dpriv->tx_dirty; in dscc4_tx_done()
447 static inline unsigned int dscc4_tx_quiescent(struct dscc4_dev_priv *dpriv, in dscc4_tx_quiescent() argument
450 return readl(dpriv->base_addr + CH0FTDA + dpriv->dev_id*4) == dpriv->ltda; in dscc4_tx_quiescent()
453 static int state_check(u32 state, struct dscc4_dev_priv *dpriv, in state_check() argument
459 if (SOURCE_ID(state) != dpriv->dev_id) { in state_check()
474 struct dscc4_dev_priv *dpriv, in dscc4_tx_print() argument
478 dev->name, dpriv->tx_current, dpriv->tx_dirty, msg); in dscc4_tx_print()
481 static void dscc4_release_ring(struct dscc4_dev_priv *dpriv) in dscc4_release_ring() argument
483 struct device *d = &dpriv->pci_priv->pdev->dev; in dscc4_release_ring()
484 struct TxFD *tx_fd = dpriv->tx_fd; in dscc4_release_ring()
485 struct RxFD *rx_fd = dpriv->rx_fd; in dscc4_release_ring()
489 dma_free_coherent(d, TX_TOTAL_SIZE, tx_fd, dpriv->tx_fd_dma); in dscc4_release_ring()
490 dma_free_coherent(d, RX_TOTAL_SIZE, rx_fd, dpriv->rx_fd_dma); in dscc4_release_ring()
492 skbuff = dpriv->tx_skbuff; in dscc4_release_ring()
503 skbuff = dpriv->rx_skbuff; in dscc4_release_ring()
516 static inline int try_get_rx_skb(struct dscc4_dev_priv *dpriv, in try_get_rx_skb() argument
519 unsigned int dirty = dpriv->rx_dirty%RX_RING_SIZE; in try_get_rx_skb()
520 struct device *d = &dpriv->pci_priv->pdev->dev; in try_get_rx_skb()
521 struct RxFD *rx_fd = dpriv->rx_fd + dirty; in try_get_rx_skb()
535 dpriv->rx_skbuff[dirty] = skb; in try_get_rx_skb()
549 static int dscc4_wait_ack_cec(struct dscc4_dev_priv *dpriv, in dscc4_wait_ack_cec() argument
555 if (!(scc_readl_star(dpriv, dev) & SccBusy)) { in dscc4_wait_ack_cec()
595 static inline int dscc4_xpr_ack(struct dscc4_dev_priv *dpriv) in dscc4_xpr_ack() argument
597 int cur = dpriv->iqtx_current%IRQ_RING_SIZE; in dscc4_xpr_ack()
601 if (!(dpriv->flags & (NeedIDR | NeedIDT)) || in dscc4_xpr_ack()
602 (dpriv->iqtx[cur] & cpu_to_le32(Xpr))) in dscc4_xpr_ack()
612 static void dscc4_rx_reset(struct dscc4_dev_priv *dpriv, struct net_device *dev)
616 spin_lock_irqsave(&dpriv->pci_priv->lock, flags);
618 writel(0x00000000, dpriv->base_addr + CH0LRDA + dpriv->dev_id*4);
619 scc_patchl(PowerUp, 0, dpriv, dev, CCR0);
620 readl(dpriv->base_addr + CH0LRDA + dpriv->dev_id*4);
621 writel(MTFi|Rdr, dpriv->base_addr + dpriv->dev_id*0x0c + CH0CFG);
622 writel(Action, dpriv->base_addr + GCMDR);
623 spin_unlock_irqrestore(&dpriv->pci_priv->lock, flags);
629 static void dscc4_tx_reset(struct dscc4_dev_priv *dpriv, struct net_device *dev)
634 scc_patchl(PowerUp, 0, dpriv, dev, CCR0);
635 scc_writel(0x00050000, dpriv, dev, CCR2);
639 while (!dscc4_tx_quiescent(dpriv, dev) && ++i) {
644 writel(MTFi|Rdt, dpriv->base_addr + dpriv->dev_id*0x0c + CH0CFG);
651 static inline void dscc4_rx_skb(struct dscc4_dev_priv *dpriv, in dscc4_rx_skb() argument
654 struct RxFD *rx_fd = dpriv->rx_fd + dpriv->rx_current%RX_RING_SIZE; in dscc4_rx_skb()
655 struct device *d = &dpriv->pci_priv->pdev->dev; in dscc4_rx_skb()
659 skb = dpriv->rx_skbuff[dpriv->rx_current++%RX_RING_SIZE]; in dscc4_rx_skb()
686 while ((dpriv->rx_dirty - dpriv->rx_current) % RX_RING_SIZE) { in dscc4_rx_skb()
687 if (try_get_rx_skb(dpriv, dev) < 0) in dscc4_rx_skb()
689 dpriv->rx_dirty++; in dscc4_rx_skb()
691 dscc4_rx_update(dpriv, dev); in dscc4_rx_skb()
717 struct dscc4_dev_priv *dpriv; in dscc4_init_one() local
794 dpriv = priv->root + i; in dscc4_init_one()
795 dpriv->iqtx = (__le32 *)dma_alloc_coherent(&pdev->dev, in dscc4_init_one()
796 IRQ_RING_SIZE*sizeof(u32), &dpriv->iqtx_dma, in dscc4_init_one()
798 if (!dpriv->iqtx) in dscc4_init_one()
800 writel(dpriv->iqtx_dma, ioaddr + IQTX0 + i*4); in dscc4_init_one()
803 dpriv = priv->root + i; in dscc4_init_one()
804 dpriv->iqrx = (__le32 *)dma_alloc_coherent(&pdev->dev, in dscc4_init_one()
805 IRQ_RING_SIZE*sizeof(u32), &dpriv->iqrx_dma, in dscc4_init_one()
807 if (!dpriv->iqrx) in dscc4_init_one()
809 writel(dpriv->iqrx_dma, ioaddr + IQRX0 + i*4); in dscc4_init_one()
829 dpriv = priv->root + i; in dscc4_init_one()
831 dpriv->iqrx, dpriv->iqrx_dma); in dscc4_init_one()
836 dpriv = priv->root + i; in dscc4_init_one()
838 dpriv->iqtx, dpriv->iqtx_dma); in dscc4_init_one()
861 static void dscc4_init_registers(struct dscc4_dev_priv *dpriv, in dscc4_init_registers() argument
865 scc_writel(0x00000000, dpriv, dev, CCR0); in dscc4_init_registers()
867 scc_writel(LengthCheck | (HDLC_MAX_MRU >> 5), dpriv, dev, RLCR); in dscc4_init_registers()
875 scc_writel(0x02408000, dpriv, dev, CCR1); in dscc4_init_registers()
878 scc_writel(0x00050008 & ~RxActivate, dpriv, dev, CCR2); in dscc4_init_registers()
883 static inline int dscc4_set_quartz(struct dscc4_dev_priv *dpriv, int hz) in dscc4_set_quartz() argument
890 dpriv->pci_priv->xtal_hz = hz; in dscc4_set_quartz()
927 struct dscc4_dev_priv *dpriv = root + i; in dscc4_found1() local
928 struct net_device *d = dscc4_to_dev(dpriv); in dscc4_found1()
937 dpriv->dev_id = i; in dscc4_found1()
938 dpriv->pci_priv = ppriv; in dscc4_found1()
939 dpriv->base_addr = ioaddr; in dscc4_found1()
940 spin_lock_init(&dpriv->lock); in dscc4_found1()
945 dscc4_init_registers(dpriv, d); in dscc4_found1()
946 dpriv->parity = PARITY_CRC16_PR0_CCITT; in dscc4_found1()
947 dpriv->encoding = ENCODING_NRZ; in dscc4_found1()
956 dscc4_release_ring(dpriv); in dscc4_found1()
988 static int dscc4_loopback_check(struct dscc4_dev_priv *dpriv) in dscc4_loopback_check() argument
990 sync_serial_settings *settings = &dpriv->settings; in dscc4_loopback_check()
993 struct net_device *dev = dscc4_to_dev(dpriv); in dscc4_loopback_check()
1042 struct dscc4_dev_priv *dpriv = dscc4_priv(dev); in dscc4_open() local
1045 if ((dscc4_loopback_check(dpriv) < 0)) in dscc4_open()
1060 if (dpriv->flags & FakeReset) { in dscc4_open()
1061 dpriv->flags &= ~FakeReset; in dscc4_open()
1062 scc_patchl(0, PowerUp, dpriv, dev, CCR0); in dscc4_open()
1063 scc_patchl(0, 0x00050000, dpriv, dev, CCR2); in dscc4_open()
1064 scc_writel(EventsMask, dpriv, dev, IMR); in dscc4_open()
1070 dpriv->flags = NeedIDR | NeedIDT; in dscc4_open()
1072 scc_patchl(0, PowerUp | Vis, dpriv, dev, CCR0); in dscc4_open()
1081 if (scc_readl_star(dpriv, dev) & SccBusy) { in dscc4_open()
1088 scc_writel(EventsMask, dpriv, dev, IMR); in dscc4_open()
1091 scc_writel(TxSccRes | RxSccRes, dpriv, dev, CMDR); in dscc4_open()
1093 if ((ret = dscc4_wait_ack_cec(dpriv, dev, "Cec")) < 0) in dscc4_open()
1103 if ((ret = dscc4_xpr_ack(dpriv)) < 0) { in dscc4_open()
1109 dscc4_tx_print(dev, dpriv, "Open"); in dscc4_open()
1119 scc_writel(0xffffffff, dpriv, dev, IMR); in dscc4_open()
1120 scc_patchl(PowerUp | Vis, 0, dpriv, dev, CCR0); in dscc4_open()
1128 static int dscc4_tx_poll(struct dscc4_dev_priv *dpriv, struct net_device *dev) in dscc4_tx_poll() argument
1137 struct dscc4_dev_priv *dpriv = dscc4_priv(dev); in dscc4_start_xmit() local
1138 struct device *d = &dpriv->pci_priv->pdev->dev; in dscc4_start_xmit()
1150 next = dpriv->tx_current%TX_RING_SIZE; in dscc4_start_xmit()
1151 dpriv->tx_skbuff[next] = skb; in dscc4_start_xmit()
1152 tx_fd = dpriv->tx_fd + next; in dscc4_start_xmit()
1160 spin_lock(&dpriv->lock); in dscc4_start_xmit()
1161 while (dscc4_tx_poll(dpriv, dev)); in dscc4_start_xmit()
1162 spin_unlock(&dpriv->lock); in dscc4_start_xmit()
1166 dscc4_tx_print(dev, dpriv, "Xmit"); in dscc4_start_xmit()
1168 if (!((++dpriv->tx_current - dpriv->tx_dirty)%TX_RING_SIZE)) in dscc4_start_xmit()
1171 if (dscc4_tx_quiescent(dpriv, dev)) in dscc4_start_xmit()
1172 dscc4_do_tx(dpriv, dev); in dscc4_start_xmit()
1179 struct dscc4_dev_priv *dpriv = dscc4_priv(dev); in dscc4_close() local
1183 scc_patchl(PowerUp | Vis, 0, dpriv, dev, CCR0); in dscc4_close()
1184 scc_patchl(0x00050000, 0, dpriv, dev, CCR2); in dscc4_close()
1185 scc_writel(0xffffffff, dpriv, dev, IMR); in dscc4_close()
1187 dpriv->flags |= FakeReset; in dscc4_close()
1250 struct dscc4_dev_priv *dpriv = dscc4_priv(dev); in dscc4_set_clock() local
1259 xtal = dpriv->pci_priv->xtal_hz; in dscc4_set_clock()
1262 if (dscc4_check_clock_ability(dpriv->dev_id) < 0) in dscc4_set_clock()
1295 scc_writel(brr, dpriv, dev, BRR); in dscc4_set_clock()
1304 struct dscc4_dev_priv *dpriv = dscc4_priv(dev); in dscc4_ioctl() local
1305 const size_t size = sizeof(dpriv->settings); in dscc4_ioctl()
1321 if (copy_to_user(line, &dpriv->settings, size)) in dscc4_ioctl()
1329 if (dpriv->flags & FakeReset) { in dscc4_ioctl()
1333 if (copy_from_user(&dpriv->settings, line, size)) in dscc4_ioctl()
1335 ret = dscc4_set_iface(dpriv, dev); in dscc4_ioctl()
1360 static int dscc4_clock_setting(struct dscc4_dev_priv *dpriv, in dscc4_clock_setting() argument
1363 sync_serial_settings *settings = &dpriv->settings; in dscc4_clock_setting()
1368 state = scc_readl(dpriv, CCR0); in dscc4_clock_setting()
1382 scc_writel(state, dpriv, dev, CCR0); in dscc4_clock_setting()
1388 static int dscc4_encoding_setting(struct dscc4_dev_priv *dpriv, in dscc4_encoding_setting() argument
1401 i = dscc4_match(encoding, dpriv->encoding); in dscc4_encoding_setting()
1403 scc_patchl(EncodingMask, encoding[i].bits, dpriv, dev, CCR0); in dscc4_encoding_setting()
1409 static int dscc4_loopback_setting(struct dscc4_dev_priv *dpriv, in dscc4_loopback_setting() argument
1412 sync_serial_settings *settings = &dpriv->settings; in dscc4_loopback_setting()
1415 state = scc_readl(dpriv, CCR1); in dscc4_loopback_setting()
1423 scc_writel(state, dpriv, dev, CCR1); in dscc4_loopback_setting()
1427 static int dscc4_crc_setting(struct dscc4_dev_priv *dpriv, in dscc4_crc_setting() argument
1438 i = dscc4_match(crc, dpriv->parity); in dscc4_crc_setting()
1440 scc_patchl(CrcMask, crc[i].bits, dpriv, dev, CCR1); in dscc4_crc_setting()
1446 static int dscc4_set_iface(struct dscc4_dev_priv *dpriv, struct net_device *dev) in dscc4_set_iface() argument
1460 if ((ret = p->action(dpriv, dev)) < 0) in dscc4_set_iface()
1525 struct dscc4_dev_priv *dpriv) in dscc4_tx_irq() argument
1527 struct net_device *dev = dscc4_to_dev(dpriv); in dscc4_tx_irq()
1532 cur = dpriv->iqtx_current%IRQ_RING_SIZE; in dscc4_tx_irq()
1533 state = le32_to_cpu(dpriv->iqtx[cur]); in dscc4_tx_irq()
1541 if ((dpriv->tx_current - dpriv->tx_dirty)%TX_RING_SIZE) in dscc4_tx_irq()
1544 if (netif_running(dev) && dscc4_tx_quiescent(dpriv, dev) && in dscc4_tx_irq()
1545 !dscc4_tx_done(dpriv)) in dscc4_tx_irq()
1546 dscc4_do_tx(dpriv, dev); in dscc4_tx_irq()
1550 dpriv->iqtx[cur] = 0; in dscc4_tx_irq()
1551 dpriv->iqtx_current++; in dscc4_tx_irq()
1553 if (state_check(state, dpriv, dev, "Tx") < 0) in dscc4_tx_irq()
1562 dscc4_tx_print(dev, dpriv, "Alls"); in dscc4_tx_irq()
1567 cur = dpriv->tx_dirty%TX_RING_SIZE; in dscc4_tx_irq()
1568 tx_fd = dpriv->tx_fd + cur; in dscc4_tx_irq()
1569 skb = dpriv->tx_skbuff[cur]; in dscc4_tx_irq()
1579 dpriv->tx_skbuff[cur] = NULL; in dscc4_tx_irq()
1580 ++dpriv->tx_dirty; in dscc4_tx_irq()
1604 dpriv->flags = NeedIDT; in dscc4_tx_irq()
1607 dpriv->base_addr + 0x0c*dpriv->dev_id + CH0CFG); in dscc4_tx_irq()
1608 writel(Action, dpriv->base_addr + GCMDR); in dscc4_tx_irq()
1632 if (!(scc_readl_star(dpriv, dev) & SccBusy)) in dscc4_tx_irq()
1638 scc_addr = dpriv->base_addr + 0x0c*dpriv->dev_id; in dscc4_tx_irq()
1640 if (dpriv->flags & NeedIDT) { in dscc4_tx_irq()
1642 dscc4_tx_print(dev, dpriv, "Xpr"); in dscc4_tx_irq()
1643 ring = dpriv->tx_fd_dma + in dscc4_tx_irq()
1644 (dpriv->tx_dirty%TX_RING_SIZE)* in dscc4_tx_irq()
1647 dscc4_do_tx(dpriv, dev); in dscc4_tx_irq()
1651 dpriv->flags &= ~NeedIDT; in dscc4_tx_irq()
1653 if (dpriv->flags & NeedIDR) { in dscc4_tx_irq()
1654 ring = dpriv->rx_fd_dma + in dscc4_tx_irq()
1655 (dpriv->rx_current%RX_RING_SIZE)* in dscc4_tx_irq()
1658 dscc4_rx_update(dpriv, dev); in dscc4_tx_irq()
1662 dpriv->flags &= ~NeedIDR; in dscc4_tx_irq()
1665 scc_writel(0x08050008, dpriv, dev, CCR2); in dscc4_tx_irq()
1680 while (!dscc4_tx_poll(dpriv, dev)); in dscc4_tx_irq()
1695 struct dscc4_dev_priv *dpriv) in dscc4_rx_irq() argument
1697 struct net_device *dev = dscc4_to_dev(dpriv); in dscc4_rx_irq()
1702 cur = dpriv->iqrx_current%IRQ_RING_SIZE; in dscc4_rx_irq()
1703 state = le32_to_cpu(dpriv->iqrx[cur]); in dscc4_rx_irq()
1706 dpriv->iqrx[cur] = 0; in dscc4_rx_irq()
1707 dpriv->iqrx_current++; in dscc4_rx_irq()
1709 if (state_check(state, dpriv, dev, "Rx") < 0) in dscc4_rx_irq()
1721 cur = dpriv->rx_current%RX_RING_SIZE; in dscc4_rx_irq()
1722 rx_fd = dpriv->rx_fd + cur; in dscc4_rx_irq()
1739 rx_fd = dpriv->rx_fd; in dscc4_rx_irq()
1742 try_get_rx_skb(dpriv, dev); in dscc4_rx_irq()
1752 dscc4_rx_skb(dpriv, dev); in dscc4_rx_irq()
1801 scc_addr = dpriv->base_addr + 0x0c*dpriv->dev_id; in dscc4_rx_irq()
1803 scc_patchl(RxActivate, 0, dpriv, dev, CCR2); in dscc4_rx_irq()
1809 scc_writel(RxSccRes, dpriv, dev, CMDR); in dscc4_rx_irq()
1810 dpriv->flags |= RdoSet; in dscc4_rx_irq()
1818 cur = dpriv->rx_current++%RX_RING_SIZE; in dscc4_rx_irq()
1819 rx_fd = dpriv->rx_fd + cur; in dscc4_rx_irq()
1828 dscc4_rx_skb(dpriv, dev); in dscc4_rx_irq()
1832 if (dpriv->flags & RdoSet) in dscc4_rx_irq()
1841 writel(dpriv->rx_fd_dma + in dscc4_rx_irq()
1842 (dpriv->rx_current%RX_RING_SIZE)* in dscc4_rx_irq()
1856 scc_patchl(0, RxActivate, dpriv, dev, CCR2); in dscc4_rx_irq()
1881 static struct sk_buff *dscc4_init_dummy_skb(struct dscc4_dev_priv *dpriv) in dscc4_init_dummy_skb() argument
1887 struct device *d = &dpriv->pci_priv->pdev->dev; in dscc4_init_dummy_skb()
1888 int last = dpriv->tx_dirty%TX_RING_SIZE; in dscc4_init_dummy_skb()
1889 struct TxFD *tx_fd = dpriv->tx_fd + last; in dscc4_init_dummy_skb()
1903 dpriv->tx_skbuff[last] = skb; in dscc4_init_dummy_skb()
1910 struct dscc4_dev_priv *dpriv = dscc4_priv(dev); in dscc4_init_ring() local
1911 struct device *d = &dpriv->pci_priv->pdev->dev; in dscc4_init_ring()
1917 ring = dma_alloc_coherent(d, RX_TOTAL_SIZE, &dpriv->rx_fd_dma, in dscc4_init_ring()
1921 dpriv->rx_fd = rx_fd = (struct RxFD *) ring; in dscc4_init_ring()
1923 ring = dma_alloc_coherent(d, TX_TOTAL_SIZE, &dpriv->tx_fd_dma, in dscc4_init_ring()
1927 dpriv->tx_fd = tx_fd = (struct TxFD *) ring; in dscc4_init_ring()
1929 memset(dpriv->tx_skbuff, 0, sizeof(struct sk_buff *)*TX_RING_SIZE); in dscc4_init_ring()
1930 dpriv->tx_dirty = 0xffffffff; in dscc4_init_ring()
1931 i = dpriv->tx_current = 0; in dscc4_init_ring()
1936 tx_fd->data = cpu_to_le32(dpriv->tx_fd_dma); in dscc4_init_ring()
1937 (tx_fd++)->next = cpu_to_le32(dpriv->tx_fd_dma + in dscc4_init_ring()
1941 if (!dscc4_init_dummy_skb(dpriv)) in dscc4_init_ring()
1944 memset(dpriv->rx_skbuff, 0, sizeof(struct sk_buff *)*RX_RING_SIZE); in dscc4_init_ring()
1945 i = dpriv->rx_dirty = dpriv->rx_current = 0; in dscc4_init_ring()
1953 if (try_get_rx_skb(dpriv, dev) >= 0) in dscc4_init_ring()
1954 dpriv->rx_dirty++; in dscc4_init_ring()
1955 (rx_fd++)->next = cpu_to_le32(dpriv->rx_fd_dma + in dscc4_init_ring()
1962 dma_free_coherent(d, TX_TOTAL_SIZE, ring, dpriv->tx_fd_dma); in dscc4_init_ring()
1964 dma_free_coherent(d, RX_TOTAL_SIZE, rx_fd, dpriv->rx_fd_dma); in dscc4_init_ring()
1987 struct dscc4_dev_priv *dpriv = root + i; in dscc4_remove_one() local
1989 dscc4_release_ring(dpriv); in dscc4_remove_one()
1991 dpriv->iqrx, dpriv->iqrx_dma); in dscc4_remove_one()
1993 dpriv->iqtx, dpriv->iqtx_dma); in dscc4_remove_one()
2009 struct dscc4_dev_priv *dpriv = dscc4_priv(dev); in dscc4_hdlc_attach() local
2025 dpriv->encoding = encoding; in dscc4_hdlc_attach()
2026 dpriv->parity = parity; in dscc4_hdlc_attach()