Lines Matching refs:CCR0
267 #define CCR0 0x08 macro
619 scc_patchl(PowerUp, 0, dpriv, dev, CCR0);
634 scc_patchl(PowerUp, 0, dpriv, dev, CCR0);
865 scc_writel(0x00000000, dpriv, dev, CCR0); in dscc4_init_registers()
1062 scc_patchl(0, PowerUp, dpriv, dev, CCR0); in dscc4_open()
1072 scc_patchl(0, PowerUp | Vis, dpriv, dev, CCR0); in dscc4_open()
1120 scc_patchl(PowerUp | Vis, 0, dpriv, dev, CCR0); in dscc4_open()
1183 scc_patchl(PowerUp | Vis, 0, dpriv, dev, CCR0); in dscc4_close()
1368 state = scc_readl(dpriv, CCR0); in dscc4_clock_setting()
1382 scc_writel(state, dpriv, dev, CCR0); in dscc4_clock_setting()
1403 scc_patchl(EncodingMask, encoding[i].bits, dpriv, dev, CCR0); in dscc4_encoding_setting()