676 	u32 read_buf;  in smsc95xx_set_features()  local
679 	ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);  in smsc95xx_set_features()
684 		read_buf |= Tx_COE_EN_;  in smsc95xx_set_features()
686 		read_buf &= ~Tx_COE_EN_;  in smsc95xx_set_features()
689 		read_buf |= Rx_COE_EN_;  in smsc95xx_set_features()
691 		read_buf &= ~Rx_COE_EN_;  in smsc95xx_set_features()
693 	ret = smsc95xx_write_reg(dev, COE_CR, read_buf);  in smsc95xx_set_features()
697 	netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);  in smsc95xx_set_features()
1037 	u32 read_buf, write_buf, burst_cap;  in smsc95xx_reset()  local
1049 		ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
1053 	} while ((read_buf & HW_CFG_LRST_) && (timeout < 100));  in smsc95xx_reset()
1067 		ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);  in smsc95xx_reset()
1071 	} while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));  in smsc95xx_reset()
1085 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
1090 		  read_buf);  in smsc95xx_reset()
1092 	read_buf |= HW_CFG_BIR_;  in smsc95xx_reset()
1094 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
1098 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
1104 		  read_buf);  in smsc95xx_reset()
1124 	ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);  in smsc95xx_reset()
1130 		  read_buf);  in smsc95xx_reset()
1136 	ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);  in smsc95xx_reset()
1142 		  read_buf);  in smsc95xx_reset()
1144 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
1149 		  read_buf);  in smsc95xx_reset()
1152 		read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);  in smsc95xx_reset()
1154 	read_buf &= ~HW_CFG_RXDOFF_;  in smsc95xx_reset()
1157 	read_buf |= NET_IP_ALIGN << 9;  in smsc95xx_reset()
1159 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
1163 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
1168 		  "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);  in smsc95xx_reset()
1174 	ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);  in smsc95xx_reset()
1177 	netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);  in smsc95xx_reset()
1221 	ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);  in smsc95xx_reset()
1226 	read_buf |= INT_EP_CTL_PHY_INT_;  in smsc95xx_reset()
1228 	ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);  in smsc95xx_reset()