1042 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)  in ocp_reg_read()  function
1077 	return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);  in r8152_mdio_read()
1089 	return ocp_reg_read(tp, OCP_SRAM_DATA);  in sram_read()
2690 		data = ocp_reg_read(tp, OCP_PHY_STATUS);  in r8153_phy_status()
2953 	data = ocp_reg_read(tp, OCP_EEE_DATA);  in r8152_mmd_read()
2972 	config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;  in r8152_eee_en()
2973 	config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);  in r8152_eee_en()
2974 	config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;  in r8152_eee_en()
3162 	data = ocp_reg_read(tp, OCP_PHY_PATCH_CMD);  in r8153_patch_request()
3171 		if (ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)  in r8153_patch_request()
3175 	if (request && !(ocp_reg_read(tp, OCP_PHY_PATCH_STAT) & PATCH_READY)) {  in r8153_patch_request()
3188 	data = ocp_reg_read(tp, OCP_POWER_CFG);  in r8153_aldps_en()
3221 	config = ocp_reg_read(tp, OCP_EEE_CFG);  in r8153_eee_en()
3264 		data = ocp_reg_read(tp, OCP_EEE_CFG);  in r8153_hw_phy_cfg()
3269 	data = ocp_reg_read(tp, OCP_POWER_CFG);  in r8153_hw_phy_cfg()
3273 	data = ocp_reg_read(tp, OCP_DOWN_SPEED);  in r8153_hw_phy_cfg()
3276 	data = ocp_reg_read(tp, OCP_POWER_CFG);  in r8153_hw_phy_cfg()
3341 	data = ocp_reg_read(tp, OCP_NCTL_CFG);  in r8153b_hw_phy_cfg()
3359 	ocp_data = ocp_reg_read(tp, 0xc426);  in r8153b_hw_phy_cfg()
3376 		data = ocp_reg_read(tp, OCP_POWER_CFG);  in r8153b_hw_phy_cfg()
3380 		data = ocp_reg_read(tp, OCP_DOWN_SPEED);  in r8153b_hw_phy_cfg()
3783 	u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;  in rtl8153_in_nway()
4715 	val = ocp_reg_read(tp, OCP_EEE_ABLE);  in r8153_get_eee()
4718 	val = ocp_reg_read(tp, OCP_EEE_ADV);  in r8153_get_eee()
4721 	val = ocp_reg_read(tp, OCP_EEE_LPABLE);  in r8153_get_eee()