360 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)  in ax88772_hw_reset()  argument
367 			      AX_GPIO_GPO2EN, 5, in_pm);  in ax88772_hw_reset()
374 			     0, 0, NULL, in_pm);  in ax88772_hw_reset()
381 		ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);  in ax88772_hw_reset()
387 		ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);  in ax88772_hw_reset()
394 				    in_pm);  in ax88772_hw_reset()
399 				    in_pm);  in ax88772_hw_reset()
406 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772_hw_reset()
412 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772_hw_reset()
416 	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);  in ax88772_hw_reset()
422 			     AX88772_IPG2_DEFAULT, 0, NULL, in_pm);  in ax88772_hw_reset()
431 			     ETH_ALEN, data->mac_addr, in_pm);  in ax88772_hw_reset()
436 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772_hw_reset()
440 	rx_ctl = asix_read_rx_ctl(dev, in_pm);  in ax88772_hw_reset()
444 	rx_ctl = asix_read_medium_status(dev, in_pm);  in ax88772_hw_reset()
455 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)  in ax88772a_hw_reset()  argument
462 	ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);  in ax88772a_hw_reset()
469 			     AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);  in ax88772a_hw_reset()
476 	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);  in ax88772a_hw_reset()
482 	ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);  in ax88772a_hw_reset()
488 	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);  in ax88772a_hw_reset()
492 	ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);  in ax88772a_hw_reset()
498 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
505 			    0, 1, &chipcode, in_pm);  in ax88772a_hw_reset()
511 				     0, NULL, in_pm);  in ax88772a_hw_reset()
547 				AX88772_IPG2_DEFAULT, 0, NULL, in_pm);  in ax88772a_hw_reset()
556 							data->mac_addr, in_pm);  in ax88772a_hw_reset()
561 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772a_hw_reset()
565 	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);  in ax88772a_hw_reset()
570 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772a_hw_reset()
574 	rx_ctl = asix_read_rx_ctl(dev, in_pm);  in ax88772a_hw_reset()
578 	rx_ctl = asix_read_medium_status(dev, in_pm);  in ax88772a_hw_reset()