487 #define BYTE_REG_BITS_ON(x, p)      do { iowrite8((ioread8((p))|(x)), (p)); } while (0)
495 #define BYTE_REG_BITS_OFF(x, p)     do { iowrite8(ioread8((p)) & (~(x)), (p)); } while (0)
499 #define BYTE_REG_BITS_SET(x, m, p)   do { iowrite8((ioread8((p)) & (~(m)))|(x), (p)); } while (0)
572 		iowrite8(mask >> 16, ioaddr + IntrStatus2);  in rhine_ack_events()
589 		iowrite8(ioread8(ioaddr + StickyHW) & 0xFC, ioaddr + StickyHW);  in rhine_power_init()
592 		iowrite8(0x80, ioaddr + WOLcgClr);  in rhine_power_init()
595 		iowrite8(0xFF, ioaddr + WOLcrClr);  in rhine_power_init()
598 			iowrite8(0x03, ioaddr + WOLcrClr1);  in rhine_power_init()
606 		iowrite8(0xFF, ioaddr + PwrcsrClr);  in rhine_power_init()
608 			iowrite8(0x03, ioaddr + PwrcsrClr1);  in rhine_power_init()
643 	iowrite8(Cmd1Reset, ioaddr + ChipCmd1);  in rhine_chip_reset()
651 			iowrite8(0x40, ioaddr + MiscCmd);  in rhine_chip_reset()
730 		iowrite8(ioread8(ioaddr + ConfigA) & 0xFC, ioaddr + ConfigA);  in rhine_reload_eeprom()
1374 	    iowrite8(ioread8(ioaddr + ChipCmd1) | Cmd1FDuplex,  in rhine_check_media()
1377 	    iowrite8(ioread8(ioaddr + ChipCmd1) & ~Cmd1FDuplex,  in rhine_check_media()
1414 	iowrite8(CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_cam()
1420 	iowrite8((u8) idx, ioaddr + CamAddr);  in rhine_set_cam()
1423 		iowrite8(*addr, ioaddr + MulticastFilter0 + i);  in rhine_set_cam()
1427 	iowrite8(CAMC_CAMWR | CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_cam()
1430 	iowrite8(0, ioaddr + CamCon);  in rhine_set_cam()
1443 	iowrite8(CAMC_CAMEN | CAMC_VCAMSL, ioaddr + CamCon);  in rhine_set_vlan_cam()
1449 	iowrite8((u8) idx, ioaddr + CamAddr);  in rhine_set_vlan_cam()
1455 	iowrite8(CAMC_CAMWR | CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_vlan_cam()
1458 	iowrite8(0, ioaddr + CamCon);  in rhine_set_vlan_cam()
1470 	iowrite8(CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_cam_mask()
1477 	iowrite8(0, ioaddr + CamCon);  in rhine_set_cam_mask()
1489 	iowrite8(CAMC_CAMEN | CAMC_VCAMSL, ioaddr + CamCon);  in rhine_set_vlan_cam_mask()
1496 	iowrite8(0, ioaddr + CamCon);  in rhine_set_vlan_cam_mask()
1572 		iowrite8(dev->dev_addr[i], ioaddr + StationAddr + i);  in init_registers()
1577 	iowrite8(0x20, ioaddr + TxConfig);  in init_registers()
1603 	iowrite8(0, ioaddr + MIICmd);  in rhine_enable_linkmon()
1604 	iowrite8(MII_BMSR, ioaddr + MIIRegAddr);  in rhine_enable_linkmon()
1605 	iowrite8(0x80, ioaddr + MIICmd);  in rhine_enable_linkmon()
1609 	iowrite8(MII_BMSR | 0x40, ioaddr + MIIRegAddr);  in rhine_enable_linkmon()
1617 	iowrite8(0, ioaddr + MIICmd);  in rhine_disable_linkmon()
1620 		iowrite8(0x01, ioaddr + MIIRegAddr);	// MII_BMSR  in rhine_disable_linkmon()
1626 		iowrite8(0x80, ioaddr + MIICmd);  in rhine_disable_linkmon()
1631 		iowrite8(0, ioaddr + MIICmd);  in rhine_disable_linkmon()
1648 	iowrite8(phy_id, ioaddr + MIIPhyAddr);  in mdio_read()
1649 	iowrite8(regnum, ioaddr + MIIRegAddr);  in mdio_read()
1650 	iowrite8(0x40, ioaddr + MIICmd);		/* Trigger read */  in mdio_read()
1666 	iowrite8(phy_id, ioaddr + MIIPhyAddr);  in mdio_write()
1667 	iowrite8(regnum, ioaddr + MIIRegAddr);  in mdio_write()
1669 	iowrite8(0x20, ioaddr + MIICmd);		/* Trigger write */  in mdio_write()
1874 	iowrite8(ioread8(ioaddr + ChipCmd1) | Cmd1TxDemand,  in rhine_start_tx()
2178 		iowrite8(ioread8(ioaddr + ChipCmd) | CmdTxOn,  in rhine_restart_tx()
2185 		iowrite8(ioread8(ioaddr + ChipCmd1) | Cmd1TxDemand,  in rhine_restart_tx()
2434 	iowrite8(rp->tx_thresh | 0x02, ioaddr + TxConfig);  in rhine_close()
2491 		iowrite8(0x04, ioaddr + WOLcgClr);  in rhine_shutdown_pci()
2496 		iowrite8(WOLmagic, ioaddr + WOLcrSet);  in rhine_shutdown_pci()
2501 		iowrite8(ioread8(ioaddr + ConfigA) | 0x03, ioaddr + ConfigA);  in rhine_shutdown_pci()
2505 		iowrite8(WOLbmcast, ioaddr + WOLcgSet);  in rhine_shutdown_pci()
2508 		iowrite8(WOLlnkon | WOLlnkoff, ioaddr + WOLcrSet);  in rhine_shutdown_pci()
2511 		iowrite8(WOLucast, ioaddr + WOLcrSet);  in rhine_shutdown_pci()
2515 		iowrite8(0x01, ioaddr + PwcfgSet);  in rhine_shutdown_pci()
2516 		iowrite8(ioread8(ioaddr + StickyHW) | 0x04, ioaddr + StickyHW);  in rhine_shutdown_pci()
2522 		iowrite8(ioread8(ioaddr + StickyHW) | 0x03, ioaddr + StickyHW);  in rhine_shutdown_pci()