863 			  p_hwfn->hw_info.hw_mode);  in qed_qm_reconf()
1194 	int hw_mode = 0;  in qed_calc_hw_mode()  local
1197 		hw_mode |= 1 << MODE_BB;  in qed_calc_hw_mode()
1199 		hw_mode |= 1 << MODE_K2;  in qed_calc_hw_mode()
1208 		hw_mode |= 1 << MODE_PORTS_PER_ENG_1;  in qed_calc_hw_mode()
1211 		hw_mode |= 1 << MODE_PORTS_PER_ENG_2;  in qed_calc_hw_mode()
1214 		hw_mode |= 1 << MODE_PORTS_PER_ENG_4;  in qed_calc_hw_mode()
1223 		hw_mode |= 1 << MODE_MF_SD;  in qed_calc_hw_mode()
1225 		hw_mode |= 1 << MODE_MF_SI;  in qed_calc_hw_mode()
1227 	hw_mode |= 1 << MODE_ASIC;  in qed_calc_hw_mode()
1230 		hw_mode |= 1 << MODE_100G;  in qed_calc_hw_mode()
1232 	p_hwfn->hw_info.hw_mode = hw_mode;  in qed_calc_hw_mode()
1236 		   p_hwfn->hw_info.hw_mode);  in qed_calc_hw_mode()
1326 			      struct qed_ptt *p_ptt, int hw_mode)  in qed_hw_init_common()  argument
1363 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_ENGINE, ANY_PHASE_ID, hw_mode);  in qed_hw_init_common()
1527 			    struct qed_ptt *p_ptt, int hw_mode)  in qed_hw_init_port()  argument
1531 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_PORT, p_hwfn->port_id, hw_mode);  in qed_hw_init_port()
1543 			  int hw_mode,  in qed_hw_init_pf()  argument
1567 	if (hw_mode & BIT(MODE_MF_SD)) {  in qed_hw_init_pf()
1580 	if (hw_mode & BIT(MODE_MF_SI)) {  in qed_hw_init_pf()
1605 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_PF, rel_pf_id, hw_mode);  in qed_hw_init_pf()
1610 	rc = qed_init_run(p_hwfn, p_ptt, PHASE_QM_PF, rel_pf_id, hw_mode);  in qed_hw_init_pf()
1789 						p_hwfn->hw_info.hw_mode);  in qed_hw_init()
1795 					      p_hwfn->hw_info.hw_mode);  in qed_hw_init()
1803 					    p_hwfn->hw_info.hw_mode,  in qed_hw_init()