148 	NvRegTransmitterControl = 0x084,  enumerator
1581 	u32 tx_ctrl = readl(base + NvRegTransmitterControl);  in nv_start_tx()
1586 	writel(tx_ctrl, base + NvRegTransmitterControl);  in nv_start_tx()
1594 	u32 tx_ctrl = readl(base + NvRegTransmitterControl);  in nv_stop_tx()
1600 	writel(tx_ctrl, base + NvRegTransmitterControl);  in nv_stop_tx()
2094 	tx_status = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START;  in nv_legacybackoff_reseed()
3424 	if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START) {  in nv_update_linkspeed()
5313 		mgmt_sema = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_SEMA_MASK;  in nv_mgmt_acquire_sema()
5323 		tx_ctrl = readl(base + NvRegTransmitterControl);  in nv_mgmt_acquire_sema()
5325 		writel(tx_ctrl, base + NvRegTransmitterControl);  in nv_mgmt_acquire_sema()
5328 		tx_ctrl = readl(base + NvRegTransmitterControl);  in nv_mgmt_acquire_sema()
5348 			tx_ctrl = readl(base + NvRegTransmitterControl);  in nv_mgmt_release_sema()
5350 			writel(tx_ctrl, base + NvRegTransmitterControl);  in nv_mgmt_release_sema()
5360 	u32 data_ready = readl(base + NvRegTransmitterControl);  in nv_mgmt_get_version()
5366 	writel(data_ready ^ NVREG_XMITCTL_DATA_START, base + NvRegTransmitterControl);  in nv_mgmt_get_version()
5369 		data_ready2 = readl(base + NvRegTransmitterControl);  in nv_mgmt_get_version()
5407 	writel(0, base + NvRegTransmitterControl);  in nv_open()
5951 		if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST) &&  in nv_probe()
5952 		    (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) &&  in nv_probe()
5960 			    ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) ==  in nv_probe()