Lines Matching refs:NVREG_IRQSTAT_MASK
109 #define NVREG_IRQSTAT_MASK 0x83ff macro
2685 status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; in nv_tx_timeout()
2687 status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; in nv_tx_timeout()
3902 events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; in nv_nic_irq_test()
3905 events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; in nv_nic_irq_test()
4158 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_do_nic_poll()
4160 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); in nv_do_nic_poll()
5044 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_interrupt_test()
5046 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); in nv_interrupt_test()
5214 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_self_test()
5216 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); in nv_self_test()
5447 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_open()
5498 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_open()