35 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in vxge_hw_vpath_intr_enable()  local
49 	vp_reg = vpath->vp_reg;  in vxge_hw_vpath_intr_enable()
51 	writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_reg);  in vxge_hw_vpath_intr_enable()
54 			&vp_reg->general_errors_reg);  in vxge_hw_vpath_intr_enable()
57 			&vp_reg->pci_config_errors_reg);  in vxge_hw_vpath_intr_enable()
60 			&vp_reg->mrpcim_to_vpath_alarm_reg);  in vxge_hw_vpath_intr_enable()
63 			&vp_reg->srpcim_to_vpath_alarm_reg);  in vxge_hw_vpath_intr_enable()
66 			&vp_reg->vpath_ppif_int_status);  in vxge_hw_vpath_intr_enable()
69 			&vp_reg->srpcim_msg_to_vpath_reg);  in vxge_hw_vpath_intr_enable()
72 			&vp_reg->vpath_pcipif_int_status);  in vxge_hw_vpath_intr_enable()
75 			&vp_reg->prc_alarm_reg);  in vxge_hw_vpath_intr_enable()
78 			&vp_reg->wrdma_alarm_status);  in vxge_hw_vpath_intr_enable()
81 			&vp_reg->asic_ntwk_vp_err_reg);  in vxge_hw_vpath_intr_enable()
84 			&vp_reg->xgmac_vp_int_status);  in vxge_hw_vpath_intr_enable()
86 	val64 = readq(&vp_reg->vpath_general_int_status);  in vxge_hw_vpath_intr_enable()
91 			&vp_reg->vpath_pcipif_int_mask);  in vxge_hw_vpath_intr_enable()
94 			&vp_reg->srpcim_msg_to_vpath_mask);  in vxge_hw_vpath_intr_enable()
97 			&vp_reg->srpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_enable()
100 			&vp_reg->mrpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_enable()
103 			&vp_reg->pci_config_errors_mask);  in vxge_hw_vpath_intr_enable()
111 		&vp_reg->general_errors_mask);  in vxge_hw_vpath_intr_enable()
120 		&vp_reg->kdfcctl_errors_mask);  in vxge_hw_vpath_intr_enable()
122 	__vxge_hw_pio_mem_write32_upper(0, &vp_reg->vpath_ppif_int_mask);  in vxge_hw_vpath_intr_enable()
126 		&vp_reg->prc_alarm_mask);  in vxge_hw_vpath_intr_enable()
128 	__vxge_hw_pio_mem_write32_upper(0, &vp_reg->wrdma_alarm_mask);  in vxge_hw_vpath_intr_enable()
129 	__vxge_hw_pio_mem_write32_upper(0, &vp_reg->xgmac_vp_int_mask);  in vxge_hw_vpath_intr_enable()
133 			&vp_reg->asic_ntwk_vp_err_mask);  in vxge_hw_vpath_intr_enable()
138 		&vp_reg->asic_ntwk_vp_err_mask);  in vxge_hw_vpath_intr_enable()
141 		&vp_reg->vpath_general_int_mask);  in vxge_hw_vpath_intr_enable()
163 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in vxge_hw_vpath_intr_disable()  local
175 	vp_reg = vpath->vp_reg;  in vxge_hw_vpath_intr_disable()
179 		&vp_reg->vpath_general_int_mask);  in vxge_hw_vpath_intr_disable()
183 	writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask);  in vxge_hw_vpath_intr_disable()
186 			&vp_reg->general_errors_mask);  in vxge_hw_vpath_intr_disable()
189 			&vp_reg->pci_config_errors_mask);  in vxge_hw_vpath_intr_disable()
192 			&vp_reg->mrpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_disable()
195 			&vp_reg->srpcim_to_vpath_alarm_mask);  in vxge_hw_vpath_intr_disable()
198 			&vp_reg->vpath_ppif_int_mask);  in vxge_hw_vpath_intr_disable()
201 			&vp_reg->srpcim_msg_to_vpath_mask);  in vxge_hw_vpath_intr_disable()
204 			&vp_reg->vpath_pcipif_int_mask);  in vxge_hw_vpath_intr_disable()
207 			&vp_reg->wrdma_alarm_mask);  in vxge_hw_vpath_intr_disable()
210 			&vp_reg->prc_alarm_mask);  in vxge_hw_vpath_intr_disable()
213 			&vp_reg->xgmac_vp_int_mask);  in vxge_hw_vpath_intr_disable()
216 			&vp_reg->asic_ntwk_vp_err_mask);  in vxge_hw_vpath_intr_disable()
224 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in vxge_hw_vpath_tti_ci_set()  local
231 	vp_reg = fifo->vp_reg;  in vxge_hw_vpath_tti_ci_set()
236 		val64 = readq(&vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_tti_ci_set()
239 		writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_tti_ci_set()
249 	writeq(val64, &ring->vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]);  in vxge_hw_vpath_dynamic_rti_ci_set()
262 	writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]);  in vxge_hw_vpath_dynamic_tti_rtimer_set()
278 	writeq(val64, &ring->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]);  in vxge_hw_vpath_dynamic_rti_rtimer_set()
612 	struct vxge_hw_vpath_reg __iomem *vp_reg;  in __vxge_hw_vpath_alarm_process()  local
621 	vp_reg = vpath->vp_reg;  in __vxge_hw_vpath_alarm_process()
622 	alarm_status = readq(&vp_reg->vpath_general_int_status);  in __vxge_hw_vpath_alarm_process()
646 		val64 = readq(&vp_reg->xgmac_vp_int_status);  in __vxge_hw_vpath_alarm_process()
651 			val64 = readq(&vp_reg->asic_ntwk_vp_err_reg);  in __vxge_hw_vpath_alarm_process()
666 					&vp_reg->asic_ntwk_vp_err_mask);  in __vxge_hw_vpath_alarm_process()
687 					&vp_reg->asic_ntwk_vp_err_mask);  in __vxge_hw_vpath_alarm_process()
695 				&vp_reg->asic_ntwk_vp_err_reg);  in __vxge_hw_vpath_alarm_process()
707 		pic_status = readq(&vp_reg->vpath_ppif_int_status);  in __vxge_hw_vpath_alarm_process()
712 			val64 = readq(&vp_reg->general_errors_reg);  in __vxge_hw_vpath_alarm_process()
713 			mask64 = readq(&vp_reg->general_errors_mask);  in __vxge_hw_vpath_alarm_process()
750 					&vp_reg->general_errors_reg);  in __vxge_hw_vpath_alarm_process()
760 			val64 = readq(&vp_reg->kdfcctl_errors_reg);  in __vxge_hw_vpath_alarm_process()
761 			mask64 = readq(&vp_reg->kdfcctl_errors_mask);  in __vxge_hw_vpath_alarm_process()
795 					&vp_reg->kdfcctl_errors_reg);  in __vxge_hw_vpath_alarm_process()
806 		val64 = readq(&vp_reg->wrdma_alarm_status);  in __vxge_hw_vpath_alarm_process()
810 			val64 = readq(&vp_reg->prc_alarm_reg);  in __vxge_hw_vpath_alarm_process()
811 			mask64 = readq(&vp_reg->prc_alarm_mask);  in __vxge_hw_vpath_alarm_process()
846 					&vp_reg->prc_alarm_reg);  in __vxge_hw_vpath_alarm_process()
2011 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_enable()
2020 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_enable()
2048 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_disable()
2056 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_promisc_disable()
2082 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_bcast_enable()
2086 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_bcast_enable()
2114 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_enable()
2118 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_enable()
2147 	val64 = readq(&vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_disable()
2151 		writeq(val64, &vpath->vp_reg->rxmac_vcfg0);  in vxge_hw_vpath_mcast_disable()
2199 	struct vxge_hw_vpath_reg __iomem *vp_reg = vpath->vp_reg;  in vxge_hw_vpath_msix_set()  local
2207 	writeq(val64, &vp_reg->interrupt_cfg0);  in vxge_hw_vpath_msix_set()
2211 			&vp_reg->interrupt_cfg2);  in vxge_hw_vpath_msix_set()
2217 				0, 32), &vp_reg->one_shot_vect0_en);  in vxge_hw_vpath_msix_set()
2220 				0, 32), &vp_reg->one_shot_vect1_en);  in vxge_hw_vpath_msix_set()
2223 				0, 32), &vp_reg->one_shot_vect2_en);  in vxge_hw_vpath_msix_set()
2415 				&ring->vp_reg->prc_rxd_doorbell);  in vxge_hw_vpath_poll_rx()