1146 		rxdp->control_0	= rxdp->control_1 = 0;  in vxge_hw_ring_rxd_reserve()
1213 	rxdp->control_0	= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_post_post()
1237 	rxdp->control_0	= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_post()
1297 	u64 control_0, own;  in vxge_hw_ring_rxd_next_completed()  local
1309 	control_0 = rxdp->control_0;  in vxge_hw_ring_rxd_next_completed()
1310 	own = control_0 & VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_next_completed()
1311 	*t_code	= (u8)VXGE_HW_RING_RXD_T_CODE_GET(control_0);  in vxge_hw_ring_rxd_next_completed()
1399 		&fifo->nofl_db->control_0);  in __vxge_hw_non_offload_db_post()
1469 			txdp->control_0 = txdp->control_1 = 0;  in vxge_hw_fifo_txdl_reserve()
1504 		txdp->control_0 = txdp->control_1 = 0;  in vxge_hw_fifo_txdl_buffer_set()
1506 		txdp->control_0 |= VXGE_HW_FIFO_TXD_GATHER_CODE(  in vxge_hw_fifo_txdl_buffer_set()
1514 			txdp_last->control_0 |= VXGE_HW_FIFO_TXD_GATHER_CODE(  in vxge_hw_fifo_txdl_buffer_set()
1522 	txdp->control_0 |= VXGE_HW_FIFO_TXD_BUFFER_SIZE(size);  in vxge_hw_fifo_txdl_buffer_set()
1549 	txdp_last->control_0 |=  in vxge_hw_fifo_txdl_post()
1551 	txdp_first->control_0 |= VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER;  in vxge_hw_fifo_txdl_post()
1619 	if (!(txdp->control_0 & VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER)) {  in vxge_hw_fifo_txdl_next_completed()
1625 		*t_code = (u8)VXGE_HW_FIFO_TXD_T_CODE_GET(txdp->control_0);  in vxge_hw_fifo_txdl_next_completed()