Lines Matching refs:max_buff
27 u32 max_buff; member
34 u32 max_buff; member
104 u32 min_buff, u32 max_buff, u8 pool) in mlxsw_sp_sb_cm_write() argument
110 min_buff, max_buff, pool); in mlxsw_sp_sb_cm_write()
119 cm->max_buff = max_buff; in mlxsw_sp_sb_cm_write()
127 u32 min_buff, u32 max_buff) in mlxsw_sp_sb_pm_write() argument
134 min_buff, max_buff); in mlxsw_sp_sb_pm_write()
141 pm->max_buff = max_buff; in mlxsw_sp_sb_pm_write()
312 .max_buff = _max_buff, \
413 min_buff, cm->max_buff, cm->pool); in __mlxsw_sp_sb_cms_init()
448 .max_buff = _max_buff, \
482 pm->min_buff, pm->max_buff); in __mlxsw_sp_port_sb_pms_init()
509 u32 max_buff; member
516 .max_buff = _max_buff, \
555 mlxsw_reg_sbmm_pack(sbmm_pl, i, min_buff, mc->max_buff, in mlxsw_sp_sb_mms_init()
691 enum mlxsw_reg_sbxx_dir dir, u32 max_buff) in mlxsw_sp_sb_threshold_out() argument
696 return max_buff - MLXSW_SP_SB_THRESHOLD_TO_ALPHA_OFFSET; in mlxsw_sp_sb_threshold_out()
697 return mlxsw_sp_cells_bytes(mlxsw_sp, max_buff); in mlxsw_sp_sb_threshold_out()
734 pm->max_buff); in mlxsw_sp_sb_port_pool_get()
748 u32 max_buff; in mlxsw_sp_sb_port_pool_set() local
752 threshold, &max_buff); in mlxsw_sp_sb_port_pool_set()
757 0, max_buff); in mlxsw_sp_sb_port_pool_set()
775 cm->max_buff); in mlxsw_sp_sb_tc_pool_bind_get()
792 u32 max_buff; in mlxsw_sp_sb_tc_pool_bind_set() local
799 threshold, &max_buff); in mlxsw_sp_sb_tc_pool_bind_set()
804 0, max_buff, pool); in mlxsw_sp_sb_tc_pool_bind_set()