66 u32 mtk_r32(struct mtk_eth *eth, unsigned reg)  in mtk_r32()  function
76 		if (!(mtk_r32(eth, MTK_PHY_IAC) & PHY_IAC_ACCESS))  in mtk_mdio_busy_wait()
121 	d = mtk_r32(eth, MTK_PHY_IAC) & 0xffff;  in _mtk_mdio_read()
430 	val = mtk_r32(eth, MTK_QDMA_INT_MASK);  in mtk_tx_irq_disable()
441 	val = mtk_r32(eth, MTK_QDMA_INT_MASK);  in mtk_tx_irq_enable()
452 	val = mtk_r32(eth, MTK_PDMA_INT_MASK);  in mtk_rx_irq_disable()
463 	val = mtk_r32(eth, MTK_PDMA_INT_MASK);  in mtk_rx_irq_enable()
501 	hw_stats->rx_bytes += mtk_r32(mac->hw, base);  in mtk_stats_update_mac()
502 	stats =  mtk_r32(mac->hw, base + 0x04);  in mtk_stats_update_mac()
505 	hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x08);  in mtk_stats_update_mac()
506 	hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x10);  in mtk_stats_update_mac()
507 	hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x14);  in mtk_stats_update_mac()
508 	hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x18);  in mtk_stats_update_mac()
509 	hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x1c);  in mtk_stats_update_mac()
510 	hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x20);  in mtk_stats_update_mac()
512 					mtk_r32(mac->hw, base + 0x24);  in mtk_stats_update_mac()
513 	hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x28);  in mtk_stats_update_mac()
514 	hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x2c);  in mtk_stats_update_mac()
515 	hw_stats->tx_bytes += mtk_r32(mac->hw, base + 0x30);  in mtk_stats_update_mac()
516 	stats =  mtk_r32(mac->hw, base + 0x34);  in mtk_stats_update_mac()
519 	hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x38);  in mtk_stats_update_mac()
1087 	cpu = mtk_r32(eth, MTK_QTX_CRX_PTR);  in mtk_poll_tx()
1088 	dma = mtk_r32(eth, MTK_QTX_DRX_PTR);  in mtk_poll_tx()
1139 	u32 status2 = mtk_r32(eth, MTK_INT_STATUS2);  in mtk_handle_status_irq()
1159 		status = mtk_r32(eth, MTK_QMTK_INT_STATUS);  in mtk_napi_tx()
1160 		mask = mtk_r32(eth, MTK_QDMA_INT_MASK);  in mtk_napi_tx()
1169 	status = mtk_r32(eth, MTK_QMTK_INT_STATUS);  in mtk_napi_tx()
1193 		status = mtk_r32(eth, MTK_PDMA_INT_STATUS);  in mtk_napi_rx()
1194 		mask = mtk_r32(eth, MTK_PDMA_INT_MASK);  in mtk_napi_rx()
1202 	status = mtk_r32(eth, MTK_PDMA_INT_STATUS);  in mtk_napi_rx()
1453 		val = mtk_r32(eth, MTK_PDMA_LRO_CTRL_DW0);  in mtk_hwlro_rx_uninit()
1473 	reg_val = mtk_r32(eth, MTK_LRO_CTRL_DW2_CFG(idx));  in mtk_hwlro_val_ipaddr()
1488 	reg_val = mtk_r32(eth, MTK_LRO_CTRL_DW2_CFG(idx));  in mtk_hwlro_inval_ipaddr()
1651 		if (!(mtk_r32(eth, MTK_QDMA_GLO_CFG) &  in mtk_dma_busy_wait()
1844 	val = mtk_r32(eth, glo_cfg);  in mtk_stop_dma()
1851 		val = mtk_r32(eth, glo_cfg);  in mtk_stop_dma()
1972 	val = mtk_r32(eth, MTK_CDMQ_IG_CTRL);  in mtk_hw_init()
1996 		u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));  in mtk_hw_init()