Lines Matching refs:asq

30 		hw->aq.asq.tail = I40E_VF_ATQT1;  in i40e_adminq_init_regs()
31 hw->aq.asq.head = I40E_VF_ATQH1; in i40e_adminq_init_regs()
32 hw->aq.asq.len = I40E_VF_ATQLEN1; in i40e_adminq_init_regs()
33 hw->aq.asq.bal = I40E_VF_ATQBAL1; in i40e_adminq_init_regs()
34 hw->aq.asq.bah = I40E_VF_ATQBAH1; in i40e_adminq_init_regs()
51 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
59 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
63 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
96 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_adminq_asq()
189 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, in i40e_alloc_asq_bufs()
193 hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; in i40e_alloc_asq_bufs()
197 bi = &hw->aq.asq.r.asq_bi[i]; in i40e_alloc_asq_bufs()
212 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_alloc_asq_bufs()
213 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_alloc_asq_bufs()
247 if (hw->aq.asq.r.asq_bi[i].pa) in i40e_free_asq_bufs()
248 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_free_asq_bufs()
251 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); in i40e_free_asq_bufs()
254 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_asq_bufs()
257 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_free_asq_bufs()
272 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs()
273 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs()
276 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
278 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
279 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
282 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
283 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa)) in i40e_config_asq_regs()
338 if (hw->aq.asq.count > 0) { in i40e_init_asq()
351 hw->aq.asq.next_to_use = 0; in i40e_init_asq()
352 hw->aq.asq.next_to_clean = 0; in i40e_init_asq()
370 hw->aq.asq.count = hw->aq.num_asq_entries; in i40e_init_asq()
451 if (hw->aq.asq.count == 0) { in i40e_shutdown_asq()
457 wr32(hw, hw->aq.asq.head, 0); in i40e_shutdown_asq()
458 wr32(hw, hw->aq.asq.tail, 0); in i40e_shutdown_asq()
459 wr32(hw, hw->aq.asq.len, 0); in i40e_shutdown_asq()
460 wr32(hw, hw->aq.asq.bal, 0); in i40e_shutdown_asq()
461 wr32(hw, hw->aq.asq.bah, 0); in i40e_shutdown_asq()
463 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_asq()
586 struct i40e_adminq_ring *asq = &(hw->aq.asq); in i40e_clean_asq() local
588 u16 ntc = asq->next_to_clean; in i40e_clean_asq()
592 desc = I40E_ADMINQ_DESC(*asq, ntc); in i40e_clean_asq()
593 details = I40E_ADMINQ_DETAILS(*asq, ntc); in i40e_clean_asq()
594 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
596 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
608 if (ntc == asq->count) in i40e_clean_asq()
610 desc = I40E_ADMINQ_DESC(*asq, ntc); in i40e_clean_asq()
611 details = I40E_ADMINQ_DETAILS(*asq, ntc); in i40e_clean_asq()
614 asq->next_to_clean = ntc; in i40e_clean_asq()
616 return I40E_DESC_UNUSED(asq); in i40e_clean_asq()
631 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40evf_asq_done()
662 if (hw->aq.asq.count == 0) { in i40evf_asq_send_command()
671 val = rd32(hw, hw->aq.asq.head); in i40evf_asq_send_command()
679 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); in i40evf_asq_send_command()
734 desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); in i40evf_asq_send_command()
741 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); in i40evf_asq_send_command()
759 (hw->aq.asq.next_to_use)++; in i40evf_asq_send_command()
760 if (hw->aq.asq.next_to_use == hw->aq.asq.count) in i40evf_asq_send_command()
761 hw->aq.asq.next_to_use = 0; in i40evf_asq_send_command()
763 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); in i40evf_asq_send_command()
819 if (rd32(hw, hw->aq.asq.len) & I40E_VF_ATQLEN1_ATQCRIT_MASK) { in i40evf_asq_send_command()
958 hw->aq.asq.next_to_use = 0; in i40evf_resume_aq()
959 hw->aq.asq.next_to_clean = 0; in i40evf_resume_aq()