756 				i40e_force_wb(vsi, tx_ring->q_vector);  in i40e_detect_recover_hung()
880 	tx_ring->q_vector->tx.total_bytes += total_bytes;  in i40e_clean_tx_irq()
881 	tx_ring->q_vector->tx.total_packets += total_packets;  in i40e_clean_tx_irq()
931 				  struct i40e_q_vector *q_vector)  in i40e_enable_wb_on_itr()  argument
933 	u16 flags = q_vector->tx.ring[0].flags;  in i40e_enable_wb_on_itr()
939 	if (q_vector->arm_wb_state)  in i40e_enable_wb_on_itr()
947 		     I40E_PFINT_DYN_CTLN(q_vector->reg_idx),  in i40e_enable_wb_on_itr()
955 	q_vector->arm_wb_state = true;  in i40e_enable_wb_on_itr()
964 void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)  in i40e_force_wb()  argument
974 		     I40E_PFINT_DYN_CTLN(q_vector->reg_idx), val);  in i40e_force_wb()
986 static inline bool i40e_container_is_rx(struct i40e_q_vector *q_vector,  in i40e_container_is_rx()  argument
989 	return &q_vector->rx == rc;  in i40e_container_is_rx()
992 static inline unsigned int i40e_itr_divisor(struct i40e_q_vector *q_vector)  in i40e_itr_divisor()  argument
996 	switch (q_vector->vsi->back->hw.phy.link_info.link_speed) {  in i40e_itr_divisor()
1030 static void i40e_update_itr(struct i40e_q_vector *q_vector,  in i40e_update_itr()  argument
1045 	itr = i40e_container_is_rx(q_vector, rc) ?  in i40e_update_itr()
1063 	if (q_vector->itr_countdown) {  in i40e_update_itr()
1071 	if (i40e_container_is_rx(q_vector, rc)) {  in i40e_update_itr()
1078 		    (q_vector->tx.target_itr & I40E_ITR_ADAPTIVE_LATENCY)) {  in i40e_update_itr()
1089 		    (q_vector->rx.target_itr & I40E_ITR_MASK) ==  in i40e_update_itr()
1117 		itr = min(q_vector->tx.current_itr, q_vector->rx.current_itr);  in i40e_update_itr()
1204 	itr += DIV_ROUND_UP(avg_wire_size, i40e_itr_divisor(q_vector)) *  in i40e_update_itr()
1582 	struct i40e_q_vector *q_vector = rx_ring->q_vector;  in i40e_receive_skb()  local
1588 	napi_gro_receive(&q_vector->napi, skb);  in i40e_receive_skb()
2052 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi,  in i40e_construct_skb()
2451 	rx_ring->q_vector->rx.total_packets += total_rx_packets;  in i40e_clean_rx_irq()
2452 	rx_ring->q_vector->rx.total_bytes += total_rx_bytes;  in i40e_clean_rx_irq()
2505 					  struct i40e_q_vector *q_vector)  in i40e_update_enable_itr()  argument
2517 	i40e_update_itr(q_vector, &q_vector->tx);  in i40e_update_enable_itr()
2518 	i40e_update_itr(q_vector, &q_vector->rx);  in i40e_update_enable_itr()
2528 	if (q_vector->rx.target_itr < q_vector->rx.current_itr) {  in i40e_update_enable_itr()
2531 					   q_vector->rx.target_itr);  in i40e_update_enable_itr()
2532 		q_vector->rx.current_itr = q_vector->rx.target_itr;  in i40e_update_enable_itr()
2533 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in i40e_update_enable_itr()
2534 	} else if ((q_vector->tx.target_itr < q_vector->tx.current_itr) ||  in i40e_update_enable_itr()
2535 		   ((q_vector->rx.target_itr - q_vector->rx.current_itr) <  in i40e_update_enable_itr()
2536 		    (q_vector->tx.target_itr - q_vector->tx.current_itr))) {  in i40e_update_enable_itr()
2541 					   q_vector->tx.target_itr);  in i40e_update_enable_itr()
2542 		q_vector->tx.current_itr = q_vector->tx.target_itr;  in i40e_update_enable_itr()
2543 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in i40e_update_enable_itr()
2544 	} else if (q_vector->rx.current_itr != q_vector->rx.target_itr) {  in i40e_update_enable_itr()
2547 					   q_vector->rx.target_itr);  in i40e_update_enable_itr()
2548 		q_vector->rx.current_itr = q_vector->rx.target_itr;  in i40e_update_enable_itr()
2549 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in i40e_update_enable_itr()
2553 		if (q_vector->itr_countdown)  in i40e_update_enable_itr()
2554 			q_vector->itr_countdown--;  in i40e_update_enable_itr()
2558 		wr32(hw, INTREG(q_vector->reg_idx), intval);  in i40e_update_enable_itr()
2572 	struct i40e_q_vector *q_vector =  in i40e_napi_poll()  local
2574 	struct i40e_vsi *vsi = q_vector->vsi;  in i40e_napi_poll()
2589 	i40e_for_each_ring(ring, q_vector->tx) {  in i40e_napi_poll()
2605 	budget_per_ring = max(budget/q_vector->num_ringpairs, 1);  in i40e_napi_poll()
2607 	i40e_for_each_ring(ring, q_vector->rx) {  in i40e_napi_poll()
2627 		if (!cpumask_test_cpu(cpu_id, &q_vector->affinity_mask)) {  in i40e_napi_poll()
2632 			i40e_force_wb(vsi, q_vector);  in i40e_napi_poll()
2639 			q_vector->tx.ring[0].tx_stats.tx_force_wb++;  in i40e_napi_poll()
2640 			i40e_enable_wb_on_itr(vsi, q_vector);  in i40e_napi_poll()
2646 		q_vector->arm_wb_state = false;  in i40e_napi_poll()
2651 	i40e_update_enable_itr(vsi, q_vector);  in i40e_napi_poll()