617 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000e_update_rdt_wa()
634 		ew32(TCTL, tctl & ~E1000_TCTL_EN);  in e1000e_update_tdt_wa()
1101 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000_print_hw_hang()
1107 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000_print_hw_hang()
1778 			ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_intr_msi()
1858 			ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_intr()
1902 		ew32(ICS, (icr & adapter->eiac_mask));  in e1000_msix_other()
1912 		ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);  in e1000_msix_other()
1929 		ew32(ICS, tx_ring->ims_val);  in e1000_intr_msix_tx()
1932 		ew32(IMS, adapter->tx_ring->ims_val);  in e1000_intr_msix_tx()
1983 		ew32(RFCTL, rfctl);  in e1000_configure_msix()
2019 	ew32(IVAR, ivar);  in e1000_configure_msix()
2024 	ew32(CTRL_EXT, ctrl_ext);  in e1000_configure_msix()
2215 	ew32(IMC, ~0);  in e1000_irq_disable()
2217 		ew32(EIAC_82574, 0);  in e1000_irq_disable()
2238 		ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);  in e1000_irq_enable()
2239 		ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |  in e1000_irq_enable()
2242 		ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);  in e1000_irq_enable()
2244 		ew32(IMS, IMS_ENABLE_MASK);  in e1000_irq_enable()
2267 		ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);  in e1000e_get_hw_control()
2270 		ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);  in e1000e_get_hw_control()
2293 		ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);  in e1000e_release_hw_control()
2296 		ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);  in e1000e_release_hw_control()
2619 		ew32(ITR, new_itr);  in e1000e_write_itr()
2682 				ew32(IMS, adapter->rx_ring->ims_val);  in e1000e_poll()
2759 		ew32(RCTL, rctl);  in e1000e_vlan_filter_disable()
2783 		ew32(RCTL, rctl);  in e1000e_vlan_filter_enable()
2799 	ew32(CTRL, ctrl);  in e1000e_vlan_strip_disable()
2814 	ew32(CTRL, ctrl);  in e1000e_vlan_strip_enable()
2888 				ew32(MDEF(i), (E1000_MDEF_PORT_623 |  in e1000_init_manageability_pt()
2900 	ew32(MANC2H, manc2h);  in e1000_init_manageability_pt()
2901 	ew32(MANC, manc);  in e1000_init_manageability_pt()
2920 	ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));  in e1000_configure_tx()
2921 	ew32(TDBAH(0), (tdba >> 32));  in e1000_configure_tx()
2922 	ew32(TDLEN(0), tdlen);  in e1000_configure_tx()
2923 	ew32(TDH(0), 0);  in e1000_configure_tx()
2924 	ew32(TDT(0), 0);  in e1000_configure_tx()
2935 	ew32(TIDV, adapter->tx_int_delay);  in e1000_configure_tx()
2937 	ew32(TADV, adapter->tx_abs_int_delay);  in e1000_configure_tx()
2954 		ew32(TXDCTL(0), txdctl);  in e1000_configure_tx()
2957 	ew32(TXDCTL(1), er32(TXDCTL(0)));  in e1000_configure_tx()
2972 		ew32(TARC(0), tarc);  in e1000_configure_tx()
2979 		ew32(TARC(0), tarc);  in e1000_configure_tx()
2982 		ew32(TARC(1), tarc);  in e1000_configure_tx()
2995 	ew32(TCTL, tctl);  in e1000_configure_tx()
3005 		ew32(IOSFPC, reg_val);  in e1000_configure_tx()
3014 		ew32(TARC(0), reg_val);  in e1000_configure_tx()
3109 	ew32(RFCTL, rfctl);  in e1000_setup_rctl()
3151 		ew32(PSRCTL, psrctl);  in e1000_setup_rctl()
3171 	ew32(RCTL, rctl);  in e1000_setup_rctl()
3208 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_configure_rx()
3221 		ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);  in e1000_configure_rx()
3222 		ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);  in e1000_configure_rx()
3226 	ew32(RDTR, adapter->rx_int_delay);  in e1000_configure_rx()
3229 	ew32(RADV, adapter->rx_abs_int_delay);  in e1000_configure_rx()
3236 	ew32(IAM, 0xffffffff);  in e1000_configure_rx()
3237 	ew32(CTRL_EXT, ctrl_ext);  in e1000_configure_rx()
3244 	ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));  in e1000_configure_rx()
3245 	ew32(RDBAH(0), (rdba >> 32));  in e1000_configure_rx()
3246 	ew32(RDLEN(0), rdlen);  in e1000_configure_rx()
3247 	ew32(RDH(0), 0);  in e1000_configure_rx()
3248 	ew32(RDT(0), 0);  in e1000_configure_rx()
3264 	ew32(RXCSUM, rxcsum);  in e1000_configure_rx()
3277 			ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));  in e1000_configure_rx()
3289 	ew32(RCTL, rctl);  in e1000_configure_rx()
3379 		ew32(RAH(rar_entries), 0);  in e1000e_write_uc_addr_list()
3380 		ew32(RAL(rar_entries), 0);  in e1000e_write_uc_addr_list()
3439 	ew32(RCTL, rctl);  in e1000e_set_rx_mode()
3456 		ew32(RSSRK(i), rss_key[i]);  in e1000e_setup_rss_hash()
3460 		ew32(RETA(i), 0);  in e1000e_setup_rss_hash()
3468 	ew32(RXCSUM, rxcsum);  in e1000e_setup_rss_hash()
3476 	ew32(MRQC, mrqc);  in e1000e_setup_rss_hash()
3501 			ew32(FEXTNVM7, fextnvm7 | BIT(0));  in e1000e_get_base_timinca()
3694 	ew32(TSYNCTXCTL, regval);  in e1000e_config_hwtstamp()
3705 	ew32(TSYNCRXCTL, regval);  in e1000e_config_hwtstamp()
3719 	ew32(RXMTRL, rxmtrl);  in e1000e_config_hwtstamp()
3726 	ew32(RXUDP, rxudp);  in e1000e_config_hwtstamp()
3804 	ew32(TCTL, tctl | E1000_TCTL_EN);  in e1000_flush_tx_ring()
3817 	ew32(TDT(0), tx_ring->next_to_use);  in e1000_flush_tx_ring()
3833 	ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_flush_rx_ring()
3846 	ew32(RXDCTL(0), rxdctl);  in e1000_flush_rx_ring()
3848 	ew32(RCTL, rctl | E1000_RCTL_EN);  in e1000_flush_rx_ring()
3851 	ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_flush_rx_ring()
3874 	ew32(FEXTNVM11, fext_nvm11);  in e1000_flush_desc_rings()
3916 			ew32(TIMINCA, timinca);  in e1000e_systim_reset()
3954 	ew32(PBA, pba);  in e1000e_reset()
3996 		ew32(PBA, pba);  in e1000e_reset()
4019 			ew32(PBA, pba);  in e1000e_reset()
4059 		ew32(PBA, pba);  in e1000e_reset()
4104 	ew32(WUC, 0);  in e1000e_reset()
4112 	ew32(VET, ETH_P_8021Q);  in e1000e_reset()
4174 		ew32(FEXTNVM7, reg);  in e1000e_reset()
4179 		ew32(FEXTNVM9, reg);  in e1000e_reset()
4195 		ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);  in e1000e_trigger_lsc()
4197 		ew32(ICS, E1000_ICS_LSC);  in e1000e_trigger_lsc()
4224 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000e_flush_descriptors()
4225 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);  in e1000e_flush_descriptors()
4233 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000e_flush_descriptors()
4234 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);  in e1000e_flush_descriptors()
4263 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000e_down()
4271 	ew32(TCTL, tctl);  in e1000e_down()
4506 	ew32(ICS, E1000_ICS_RXSEQ);  in e1000_test_msi_interrupt()
5107 		ew32(RCTL, rctl | E1000_RCTL_EN);  in e1000e_enable_receives()
5232 				ew32(TARC(0), tarc0);  in e1000_watchdog_task()
5261 			ew32(TCTL, tctl);  in e1000_watchdog_task()
5347 		ew32(ICS, adapter->rx_ring->ims_val);  in e1000_watchdog_task()
5349 		ew32(ICS, E1000_ICS_RXDMT0);  in e1000_watchdog_task()
6234 	ew32(WUFC, wufc);  in e1000_init_phy_wakeup()
6235 	ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |  in e1000_init_phy_wakeup()
6324 			ew32(RCTL, rctl);  in __e1000_shutdown()
6331 		ew32(CTRL, ctrl);  in __e1000_shutdown()
6339 			ew32(CTRL_EXT, ctrl_ext);  in __e1000_shutdown()
6355 			ew32(WUFC, wufc);  in __e1000_shutdown()
6356 			ew32(WUC, E1000_WUC_PME_EN);  in __e1000_shutdown()
6359 		ew32(WUC, 0);  in __e1000_shutdown()
6360 		ew32(WUFC, 0);  in __e1000_shutdown()
6590 		ew32(WUS, ~0);  in __e1000_resume()
6853 		ew32(WUS, ~0);  in e1000_io_slot_reset()