988 	struct hcp_ehea_port_cb0 *cb0;  in ehea_sense_port_attr()  local
991 	cb0 = (void *)get_zeroed_page(GFP_ATOMIC);  in ehea_sense_port_attr()
992 	if (!cb0) {  in ehea_sense_port_attr()
1001 				      cb0);  in ehea_sense_port_attr()
1008 	port->mac_addr = cb0->port_mac_addr << 16;  in ehea_sense_port_attr()
1016 	switch (cb0->port_speed) {  in ehea_sense_port_attr()
1048 	port->num_mcs = cb0->num_default_qps;  in ehea_sense_port_attr()
1052 		port->num_def_qps = cb0->num_default_qps;  in ehea_sense_port_attr()
1064 		ehea_dump(cb0, sizeof(*cb0), "ehea_sense_port_attr");  in ehea_sense_port_attr()
1065 	free_page((unsigned long)cb0);  in ehea_sense_port_attr()
1361 	struct hcp_ehea_port_cb0 *cb0;  in ehea_configure_port()  local
1364 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_configure_port()
1365 	if (!cb0)  in ehea_configure_port()
1368 	cb0->port_rc = EHEA_BMASK_SET(PXLY_RC_VALID, 1)  in ehea_configure_port()
1378 			cb0->default_qpn_arr[i] =  in ehea_configure_port()
1381 			cb0->default_qpn_arr[i] =  in ehea_configure_port()
1385 		ehea_dump(cb0, sizeof(*cb0), "ehea_configure_port");  in ehea_configure_port()
1392 				       H_PORT_CB0, mask, cb0);  in ehea_configure_port()
1400 	free_page((unsigned long)cb0);  in ehea_configure_port()
1734 	struct hcp_ehea_port_cb0 *cb0;  in ehea_set_mac_addr()  local
1743 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_set_mac_addr()
1744 	if (!cb0) {  in ehea_set_mac_addr()
1750 	memcpy(&(cb0->port_mac_addr), &(mac_addr->sa_data[0]), ETH_ALEN);  in ehea_set_mac_addr()
1752 	cb0->port_mac_addr = cb0->port_mac_addr >> 16;  in ehea_set_mac_addr()
1756 				       EHEA_BMASK_SET(H_PORT_CB0_MAC, 1), cb0);  in ehea_set_mac_addr()
1771 	port->mac_addr = cb0->port_mac_addr << 16;  in ehea_set_mac_addr()
1785 	free_page((unsigned long)cb0);  in ehea_set_mac_addr()
2186 	struct hcp_modify_qp_cb0 *cb0;  in ehea_activate_qp()  local
2188 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_activate_qp()
2189 	if (!cb0) {  in ehea_activate_qp()
2195 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2201 	cb0->qp_ctl_reg = H_QP_CR_STATE_INITIALIZED;  in ehea_activate_qp()
2203 				     EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,  in ehea_activate_qp()
2211 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2217 	cb0->qp_ctl_reg = H_QP_CR_ENABLED | H_QP_CR_STATE_INITIALIZED;  in ehea_activate_qp()
2219 				     EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,  in ehea_activate_qp()
2227 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2233 	cb0->qp_ctl_reg = H_QP_CR_ENABLED | H_QP_CR_STATE_RDY2SND;  in ehea_activate_qp()
2235 				     EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,  in ehea_activate_qp()
2243 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2251 	free_page((unsigned long)cb0);  in ehea_activate_qp()
2528 	struct hcp_modify_qp_cb0 *cb0;  in ehea_stop_qps()  local
2536 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_stop_qps()
2537 	if (!cb0) {  in ehea_stop_qps()
2552 					    cb0);  in ehea_stop_qps()
2558 		cb0->qp_ctl_reg = (cb0->qp_ctl_reg & H_QP_CR_RES_STATE) << 8;  in ehea_stop_qps()
2559 		cb0->qp_ctl_reg &= ~H_QP_CR_ENABLED;  in ehea_stop_qps()
2563 							    1), cb0, &dummy64,  in ehea_stop_qps()
2572 					    cb0);  in ehea_stop_qps()
2588 	free_page((unsigned long)cb0);  in ehea_stop_qps()
2633 	struct hcp_modify_qp_cb0 *cb0;  in ehea_restart_qps()  local
2638 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_restart_qps()
2639 	if (!cb0) {  in ehea_restart_qps()
2659 					    cb0);  in ehea_restart_qps()
2665 		cb0->qp_ctl_reg = (cb0->qp_ctl_reg & H_QP_CR_RES_STATE) << 8;  in ehea_restart_qps()
2666 		cb0->qp_ctl_reg |= H_QP_CR_ENABLED;  in ehea_restart_qps()
2670 							    1), cb0, &dummy64,  in ehea_restart_qps()
2679 					    cb0);  in ehea_restart_qps()
2691 	free_page((unsigned long)cb0);  in ehea_restart_qps()