160 	union cvmx_mixx_intena mix_intena;  in octeon_mgmt_set_rx_irq()  local
164 	mix_intena.u64 = cvmx_read_csr(p->mix + MIX_INTENA);  in octeon_mgmt_set_rx_irq()
165 	mix_intena.s.ithena = enable ? 1 : 0;  in octeon_mgmt_set_rx_irq()
166 	cvmx_write_csr(p->mix + MIX_INTENA, mix_intena.u64);  in octeon_mgmt_set_rx_irq()
172 	union cvmx_mixx_intena mix_intena;  in octeon_mgmt_set_tx_irq()  local
176 	mix_intena.u64 = cvmx_read_csr(p->mix + MIX_INTENA);  in octeon_mgmt_set_tx_irq()
177 	mix_intena.s.othena = enable ? 1 : 0;  in octeon_mgmt_set_tx_irq()
178 	cvmx_write_csr(p->mix + MIX_INTENA, mix_intena.u64);  in octeon_mgmt_set_tx_irq()
977 	union cvmx_mixx_intena mix_intena;  in octeon_mgmt_open()  local
1170 	mix_intena.u64 = 0;  in octeon_mgmt_open()
1171 	mix_intena.s.ithena = 1;  in octeon_mgmt_open()
1172 	mix_intena.s.othena = 1;  in octeon_mgmt_open()
1173 	cvmx_write_csr(p->mix + MIX_INTENA, mix_intena.u64);  in octeon_mgmt_open()