Lines Matching refs:tg3_flag
96 #define tg3_flag(tp, flag) \ macro
137 (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500)
144 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
148 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
219 #define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3)
220 #define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1)
576 if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) in _tw32_flush()
596 if (tg3_flag(tp, FLUSH_POSTED_WRITES) || in tw32_mailbox_flush()
597 (!tg3_flag(tp, MBOX_WRITE_REORDER) && in tw32_mailbox_flush()
598 !tg3_flag(tp, ICH_WORKAROUND))) in tw32_mailbox_flush()
606 if (tg3_flag(tp, TXD_MBOX_HWBUG)) in tg3_write32_tx_mbox()
608 if (tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_write32_tx_mbox()
609 tg3_flag(tp, FLUSH_POSTED_WRITES)) in tg3_write32_tx_mbox()
643 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_write_mem()
670 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_read_mem()
722 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_lock()
783 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_unlock()
860 if (!tg3_flag(tp, APE_HAS_NCSI)) in tg3_ape_scratchpad_read()
951 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_driver_state_change()
974 tg3_flag(tp, WOL_ENABLE)) { in tg3_ape_driver_state_change()
998 if (!tg3_flag(tp, ENABLE_APE) || in tg3_send_ape_heartbeat()
1031 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_enable_ints()
1038 if (!tg3_flag(tp, TAGGED_STATUS) && in tg3_enable_ints()
1054 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_has_work()
1087 if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) in tg3_int_reenable()
1097 if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) in tg3_switch_clocks()
1108 if (tg3_flag(tp, 5705_PLUS)) { in tg3_switch_clocks()
1458 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_config_5785()
1471 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1472 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1474 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1489 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1490 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1495 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1509 if (tg3_flag(tp, MDIOBUS_INITED) && in tg3_mdio_start()
1520 if (tg3_flag(tp, 5717_PLUS)) { in tg3_mdio_init()
1532 } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { in tg3_mdio_init()
1544 if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) in tg3_mdio_init()
1595 if (tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_init()
1597 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_init()
1599 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_init()
1623 if (tg3_flag(tp, MDIOBUS_INITED)) { in tg3_mdio_fini()
1714 if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) in tg3_ump_link_report()
1734 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_stop_fw()
1753 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_pre_reset()
1779 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_post_reset()
1800 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_write_sig_legacy()
1828 if (tg3_flag(tp, NO_FWARE_REPORTED)) in tg3_poll_fw()
1831 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_poll_fw()
1855 if (!tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1871 if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1984 if (tg3_flag(tp, USE_PHYLIB)) in tg3_setup_flow_control()
1989 if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_setup_flow_control()
2242 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_apd()
2243 (tg3_flag(tp, 5717_PLUS) && in tg3_phy_toggle_apd()
2273 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_automdix()
2448 tg3_flag(tp, 57765_CLASS)) && in tg3_phy_eee_enable()
2640 if (tg3_flag(tp, ENABLE_ASF)) in tg3_warn_mgmt_link_flap()
2708 if (tg3_flag(tp, 5717_PLUS) && in tg3_phy_reset()
2758 } else if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2770 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2830 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vmain()
2857 if (!tg3_flag(tp, IS_NIC) || in tg3_pwrsrc_die_with_vmain()
2879 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vaux()
2962 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) in tg3_frob_aux_power_5717()
2984 if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) in tg3_frob_aux_power()
2991 tg3_flag(tp, WOL_ENABLE) != 0 : 0); in tg3_frob_aux_power()
3004 if (tg3_flag(tp_peer, INIT_COMPLETE)) in tg3_frob_aux_power()
3007 if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || in tg3_frob_aux_power()
3008 tg3_flag(tp_peer, ENABLE_ASF)) in tg3_frob_aux_power()
3013 if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || in tg3_frob_aux_power()
3014 tg3_flag(tp, ENABLE_ASF)) in tg3_frob_aux_power()
3152 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_lock()
3175 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_unlock()
3186 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_enable_nvram_access()
3196 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_disable_nvram_access()
3266 if (tg3_flag(tp, NVRAM) && in tg3_nvram_phys_addr()
3267 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_phys_addr()
3268 tg3_flag(tp, FLASH) && in tg3_nvram_phys_addr()
3269 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_phys_addr()
3281 if (tg3_flag(tp, NVRAM) && in tg3_nvram_logical_addr()
3282 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_logical_addr()
3283 tg3_flag(tp, FLASH) && in tg3_nvram_logical_addr()
3284 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_logical_addr()
3304 if (!tg3_flag(tp, NVRAM)) in tg3_nvram_read()
3518 !tg3_flag(tp, FLASH) || in tg3_nvram_write_block_buffered()
3519 !tg3_flag(tp, 57765_PLUS)) in tg3_nvram_write_block_buffered()
3523 !tg3_flag(tp, 5755_PLUS) && in tg3_nvram_write_block_buffered()
3533 if (!tg3_flag(tp, FLASH)) { in tg3_nvram_write_block_buffered()
3550 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3556 if (!tg3_flag(tp, NVRAM)) { in tg3_nvram_write_block()
3566 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) in tg3_nvram_write_block()
3572 if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { in tg3_nvram_write_block()
3587 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3654 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3669 if (tg3_flag(tp, IS_SSB_CORE)) in tg3_halt_cpu()
3682 if (tg3_flag(tp, NVRAM)) in tg3_halt_cpu()
3723 if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { in tg3_load_firmware_cpu()
3730 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3879 if (!tg3_flag(tp, NO_NVRAM)) in tg3_load_57766_firmware()
3922 if (!tg3_flag(tp, FW_TSO)) in tg3_load_tso_firmware()
4049 if (tg3_flag(tp, CLKREQ_BUG)) in tg3_power_down_prepare()
4058 tg3_flag(tp, WOL_ENABLE); in tg3_power_down_prepare()
4060 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_power_down_prepare()
4081 if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { in tg3_power_down_prepare()
4082 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_power_down_prepare()
4119 } else if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4130 if (tg3_flag(tp, WOL_CAP)) in tg3_power_down_prepare()
4163 u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? in tg3_power_down_prepare()
4174 if (!tg3_flag(tp, 5750_PLUS)) in tg3_power_down_prepare()
4178 if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && in tg3_power_down_prepare()
4179 (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) in tg3_power_down_prepare()
4182 if (tg3_flag(tp, ENABLE_APE)) in tg3_power_down_prepare()
4194 if (!tg3_flag(tp, WOL_SPEED_100MB) && in tg3_power_down_prepare()
4205 } else if (tg3_flag(tp, 5780_CLASS) || in tg3_power_down_prepare()
4206 tg3_flag(tp, CPMU_PRESENT) || in tg3_power_down_prepare()
4209 } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { in tg3_power_down_prepare()
4218 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4232 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4249 if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) in tg3_power_down_prepare()
4255 if ((!tg3_flag(tp, IS_SSB_CORE)) && in tg3_power_down_prepare()
4262 if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4281 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); in tg3_power_down()
4426 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_phy_copper_begin()
4770 if (tg3_flag(tp, ENABLE_APE)) in tg3_setup_eee()
4821 !tg3_flag(tp, INIT_COMPLETE)) in tg3_setup_copper_phy()
4985 if (tg3_flag(tp, ROBOSWITCH)) { in tg3_setup_copper_phy()
5015 if (tg3_flag(tp, RGMII_MODE)) { in tg3_setup_copper_phy()
5059 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_setup_copper_phy()
5070 (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
5082 if (tg3_flag(tp, CLKREQ_BUG)) { in tg3_setup_copper_phy()
5464 if (tg3_flag(tp, INIT_COMPLETE) && in tg3_init_bcm8002()
5731 if (!tg3_flag(tp, HW_AUTONEG) && in tg3_setup_fiber_phy()
5733 tg3_flag(tp, INIT_COMPLETE)) { in tg3_setup_fiber_phy()
5765 if (tg3_flag(tp, HW_AUTONEG)) in tg3_setup_fiber_phy()
5987 } else if (!tg3_flag(tp, 5780_CLASS)) { in tg3_setup_fiber_mii_phy()
6119 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_setup_phy()
6128 if (tg3_flag(tp, ASPM_WORKAROUND)) { in tg3_setup_phy()
6169 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_get_ts_info()
6353 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_init()
6365 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_resume()
6374 if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) in tg3_ptp_fini()
6418 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_dump_legacy_regs()
6430 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_dump_legacy_regs()
6442 if (tg3_flag(tp, NVRAM)) in tg3_dump_legacy_regs()
6455 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_dump_state()
6510 BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_tx_recover()
6543 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx()
6978 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_rx()
7016 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_poll_link()
7023 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_poll_link()
7170 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_work()
7184 if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { in tg3_poll_work()
7237 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_msix()
7293 if (tg3_flag(tp, ERROR_PROCESSED)) in tg3_process_error()
7337 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll()
7343 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_poll()
7524 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt()
7573 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt_tagged()
7680 if (tg3_flag(tp, 40BIT_DMA_BUG)) in tg3_40bit_overflow_test()
7705 if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) in tg3_tx_frag_set()
7925 if (tg3_flag(tp, ENABLE_TSS)) in tg3_start_xmit()
7973 tg3_flag(tp, TSO_BUG)) { in tg3_start_xmit()
7990 if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
7991 tg3_flag(tp, HW_TSO_2) || in tg3_start_xmit()
7992 tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
8000 if (tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
8005 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_start_xmit()
8007 else if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
8036 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_start_xmit()
8046 tg3_flag(tp, TX_TSTAMP_EN)) { in tg3_start_xmit()
8063 if (tg3_flag(tp, 5701_DMA_BUG)) in tg3_start_xmit()
8073 if (!tg3_flag(tp, HW_TSO_1) && in tg3_start_xmit()
8074 !tg3_flag(tp, HW_TSO_2) && in tg3_start_xmit()
8075 !tg3_flag(tp, HW_TSO_3)) in tg3_start_xmit()
8177 if (!tg3_flag(tp, 5705_PLUS)) in tg3_mac_loopback()
8187 if (tg3_flag(tp, 5705_PLUS) || in tg3_mac_loopback()
8259 tg3_flag(tp, 5780_CLASS)) { in tg3_phy_lpbk_set()
8321 if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) in tg3_fix_features()
8348 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_rx_prodring_free()
8364 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_free()
8401 if (tg3_flag(tp, 5780_CLASS) && in tg3_rx_prodring_alloc()
8437 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_rx_prodring_alloc()
8442 if (!tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_rx_prodring_alloc()
8514 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_init()
8637 if (tg3_flag(tp, ENABLE_TSS)) in tg3_mem_tx_acquire()
8691 if (tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8704 if (!i && tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8782 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_alloc_consistent()
8831 if (tg3_flag(tp, 5705_PLUS)) { in tg3_stop_block()
8967 tg3_flag(tp, PCIX_MODE)) in tg3_restore_pci_state()
8970 if (tg3_flag(tp, ENABLE_APE)) in tg3_restore_pci_state()
8978 if (!tg3_flag(tp, PCI_EXPRESS)) { in tg3_restore_pci_state()
8986 if (tg3_flag(tp, PCIX_MODE)) { in tg3_restore_pci_state()
8996 if (tg3_flag(tp, 5780_CLASS)) { in tg3_restore_pci_state()
9001 if (tg3_flag(tp, USING_MSI)) { in tg3_restore_pci_state()
9087 tg3_flag(tp, 5755_PLUS)) in tg3_chip_reset()
9133 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_chip_reset()
9136 !tg3_flag(tp, 57765_PLUS) && in tg3_chip_reset()
9161 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9194 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { in tg3_chip_reset()
9216 if (!tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9234 if (tg3_flag(tp, 5780_CLASS)) in tg3_chip_reset()
9243 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_chip_reset()
9289 if (tg3_flag(tp, PCI_EXPRESS) && in tg3_chip_reset()
9292 !tg3_flag(tp, 57765_PLUS)) { in tg3_chip_reset()
9323 if (tg3_flag(tp, 5750_PLUS)) in tg3_chip_reset()
9385 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_set_mac_addr()
9421 if (!tg3_flag(tp, 5705_PLUS)) in tg3_set_bdinfo()
9432 if (!tg3_flag(tp, ENABLE_TSS)) { in tg3_coal_tx_init()
9465 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_coal_rx_init()
9499 if (!tg3_flag(tp, 5705_PLUS)) { in __tg3_set_coalesce()
9518 if (!tg3_flag(tp, 5705_PLUS)) in tg3_tx_rcbs_disable()
9520 else if (tg3_flag(tp, 5717_PLUS)) in tg3_tx_rcbs_disable()
9522 else if (tg3_flag(tp, 57765_CLASS) || in tg3_tx_rcbs_disable()
9540 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx_rcbs_init()
9561 if (tg3_flag(tp, 5717_PLUS)) in tg3_rx_ret_rcbs_disable()
9563 else if (!tg3_flag(tp, 5705_PLUS)) in tg3_rx_ret_rcbs_disable()
9567 tg3_flag(tp, 57765_CLASS)) in tg3_rx_ret_rcbs_disable()
9584 if (tg3_flag(tp, ENABLE_RSS)) in tg3_rx_ret_rcbs_init()
9617 if (tg3_flag(tp, SUPPORT_MSIX)) { in tg3_rings_reset()
9621 if (tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9629 if (!tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9639 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_rings_reset()
9674 if (!tg3_flag(tp, 5750_PLUS) || in tg3_setup_rxbd_thresholds()
9675 tg3_flag(tp, 5780_CLASS) || in tg3_setup_rxbd_thresholds()
9678 tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9692 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9695 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_setup_rxbd_thresholds()
9705 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9754 if (!tg3_flag(tp, ENABLE_ASF)) in __tg3_set_rx_mode()
9822 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_rss_check_indir_tbl()
9878 if (tg3_flag(tp, INIT_COMPLETE)) in tg3_reset_hw()
9937 if (tg3_flag(tp, L1PLLPD_EN)) { in tg3_reset_hw()
9951 if (tg3_flag(tp, 57765_CLASS)) { in tg3_reset_hw()
10001 if (!tg3_flag(tp, CPMU_PRESENT)) { in tg3_reset_hw()
10002 if (!tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10008 tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10014 if (tg3_flag(tp, ENABLE_APE)) { in tg3_reset_hw()
10041 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10046 if (!tg3_flag(tp, 57765_CLASS) && in tg3_reset_hw()
10078 if (tg3_flag(tp, PTP_CAPABLE)) in tg3_reset_hw()
10100 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10110 } else if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10186 if (!tg3_flag(tp, 5717_PLUS)) in tg3_reset_hw()
10191 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10199 (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { in tg3_reset_hw()
10201 if (tg3_flag(tp, JUMBO_RING_ENABLE)) { in tg3_reset_hw()
10210 if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || in tg3_reset_hw()
10211 tg3_flag(tp, 57765_CLASS) || in tg3_reset_hw()
10220 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10235 tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; in tg3_reset_hw()
10287 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10291 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10296 if (tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10307 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10308 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10309 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10312 if (tg3_flag(tp, 57765_PLUS) || in tg3_reset_hw()
10325 tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10363 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10368 tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10391 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10417 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10430 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10432 if (!tg3_flag(tp, 5705_PLUS) && in tg3_reset_hw()
10445 if (!tg3_flag(tp, IS_NIC)) { in tg3_reset_hw()
10463 if (tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_reset_hw()
10470 if (tg3_flag(tp, USING_MSIX)) { in tg3_reset_hw()
10475 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_reset_hw()
10480 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10493 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10498 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10504 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10513 if (tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10547 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10559 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_reset_hw()
10563 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10564 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10565 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10568 if (tg3_flag(tp, ENABLE_TSS)) in tg3_reset_hw()
10586 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10594 if (tg3_flag(tp, 5755_PLUS) || in tg3_reset_hw()
10608 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_reset_hw()
10620 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10626 if (tg3_flag(tp, ENABLE_RSS)) in tg3_reset_hw()
10664 if (tg3_flag(tp, 57765_CLASS)) in tg3_reset_hw()
10687 if (!tg3_flag(tp, USE_PHYLIB)) { in tg3_reset_hw()
10716 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) in tg3_reset_hw()
10720 if (tg3_flag(tp, ENABLE_ASF)) in tg3_reset_hw()
10770 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10915 if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && in tg3_periodic_fetch_stats()
10990 if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) { in tg3_timer()
10996 tg3_flag(tp, 57765_CLASS)) in tg3_timer()
10999 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_timer()
11004 if (!tg3_flag(tp, TAGGED_STATUS)) { in tg3_timer()
11026 if (tg3_flag(tp, 5705_PLUS)) in tg3_timer()
11032 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_timer()
11047 } else if (tg3_flag(tp, POLL_SERDES)) { in tg3_timer()
11072 tg3_flag(tp, 5780_CLASS)) { in tg3_timer()
11074 } else if (tg3_flag(tp, POLL_CPMU_LINK)) { in tg3_timer()
11104 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_timer()
11130 if (tg3_flag(tp, TAGGED_STATUS) && in tg3_timer_init()
11132 !tg3_flag(tp, 57765_CLASS)) in tg3_timer_init()
11207 if (tg3_flag(tp, TX_RECOVERY_PENDING)) { in tg3_reset_task()
11257 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_request_irq()
11259 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_request_irq()
11264 if (tg3_flag(tp, TAGGED_STATUS)) in tg3_request_irq()
11290 if (tg3_flag(tp, 57765_PLUS)) { in tg3_test_interrupt()
11318 if (tg3_flag(tp, 57765_PLUS) && in tg3_test_interrupt()
11336 if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { in tg3_test_interrupt()
11354 if (!tg3_flag(tp, USING_MSI)) in tg3_test_msi()
11515 if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && in tg3_ints_init()
11516 !tg3_flag(tp, TAGGED_STATUS)) { in tg3_ints_init()
11525 if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) in tg3_ints_init()
11527 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) in tg3_ints_init()
11530 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11532 if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) in tg3_ints_init()
11534 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_ints_init()
11539 if (!tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11554 if (tg3_flag(tp, USING_MSIX)) in tg3_ints_fini()
11556 else if (tg3_flag(tp, USING_MSI)) in tg3_ints_fini()
11617 if (test_irq && tg3_flag(tp, USING_MSI)) { in tg3_start()
11629 if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { in tg3_start()
11741 } else if (!tg3_flag(tp, TSO_CAPABLE)) { in tg3_open()
12001 if (tg3_flag(tp, NO_NVRAM)) in tg3_get_eeprom()
12011 if (tg3_flag(tp, CPMU_PRESENT)) { in tg3_get_eeprom()
12092 if (tg3_flag(tp, NO_NVRAM) || in tg3_set_eeprom()
12146 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_get_link_ksettings()
12177 if (tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_get_link_ksettings()
12222 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_link_ksettings()
12325 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12330 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12343 !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) in tg3_set_wol()
12381 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_nway_reset()
12409 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12417 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12434 (tg3_flag(tp, TSO_BUG) && in tg3_set_ringparam()
12448 if (tg3_flag(tp, MAX_RXPEND_64) && in tg3_set_ringparam()
12452 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_set_ringparam()
12477 epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); in tg3_get_pauseparam()
12498 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_pauseparam()
12614 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxnfc()
12639 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxfh_indir_size()
12680 if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) in tg3_set_rxfh()
12723 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_set_channels()
12813 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) in tg3_vpd_readblock()
12898 if (tg3_flag(tp, NO_NVRAM)) in tg3_test_nvram()
13248 if (tg3_flag(tp, 5705_PLUS)) { in tg3_test_registers()
13250 if (tg3_flag(tp, 5750_PLUS)) in tg3_test_registers()
13261 if (tg3_flag(tp, IS_5788) && in tg3_test_registers()
13384 if (tg3_flag(tp, 5717_PLUS)) in tg3_test_memory()
13386 else if (tg3_flag(tp, 57765_CLASS) || in tg3_test_memory()
13389 else if (tg3_flag(tp, 5755_PLUS)) in tg3_test_memory()
13393 else if (tg3_flag(tp, 5705_PLUS)) in tg3_test_memory()
13446 if (tg3_flag(tp, ENABLE_RSS)) in tg3_run_loopback()
13448 if (tg3_flag(tp, ENABLE_TSS)) in tg3_run_loopback()
13485 if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13486 tg3_flag(tp, HW_TSO_2) || in tg3_run_loopback()
13487 tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13495 if (tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13500 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_run_loopback()
13502 else if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13514 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_run_loopback()
13675 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_test_loopback()
13690 !tg3_flag(tp, CPMU_PRESENT)) { in tg3_test_loopback()
13696 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13704 !tg3_flag(tp, USE_PHYLIB)) { in tg3_test_loopback()
13718 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13721 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13737 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13741 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13799 if (!tg3_flag(tp, 5705_PLUS)) in tg3_self_test()
13855 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_set()
13942 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_get()
13946 stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? in tg3_hwtstamp_get()
14004 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_ioctl()
14077 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_set_coalesce()
14211 if (!tp->hw_stats || !tg3_flag(tp, INIT_COMPLETE)) { in tg3_get_stats64()
14239 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14246 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14356 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) in tg3_get_nvram_size()
14398 tg3_flag(tp, 5780_CLASS)) { in tg3_get_nvram_info()
14493 if (tg3_flag(tp, FLASH)) { in tg3_get_5752_nvram_info()
14998 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_nvram_init()
15045 tg3_flag(tp, 57765_CLASS)) in tg3_nvram_init()
15223 if (!tg3_flag(tp, 5705_PLUS)) in tg3_get_eeprom_hw_cfg()
15229 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15264 if (tg3_flag(tp, 5717_PLUS) || in tg3_get_eeprom_hw_cfg()
15306 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15311 tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15318 if (tg3_flag(tp, WOL_CAP) && in tg3_get_eeprom_hw_cfg()
15332 if ((tg3_flag(tp, 57765_PLUS) || in tg3_get_eeprom_hw_cfg()
15338 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_get_eeprom_hw_cfg()
15343 !tg3_flag(tp, 57765_PLUS) && in tg3_get_eeprom_hw_cfg()
15363 if (tg3_flag(tp, WOL_CAP)) in tg3_get_eeprom_hw_cfg()
15365 tg3_flag(tp, WOL_ENABLE)); in tg3_get_eeprom_hw_cfg()
15491 if (tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15508 if (!tg3_flag(tp, ENABLE_ASF) && in tg3_phy_probe()
15514 if (tg3_flag(tp, USE_PHYLIB)) in tg3_phy_probe()
15521 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15559 } else if (!tg3_flag(tp, IS_SSB_CORE)) { in tg3_phy_probe()
15600 !tg3_flag(tp, ENABLE_APE) && in tg3_phy_probe()
15601 !tg3_flag(tp, ENABLE_ASF)) { in tg3_phy_probe()
15914 if (!tg3_flag(tp, 5705_PLUS)) in tg3_read_mgmtfw_ver()
15972 if (tg3_flag(tp, APE_HAS_NCSI)) in tg3_read_dash_ver()
16022 if (tg3_flag(tp, NO_NVRAM)) { in tg3_read_fw_ver()
16038 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_read_fw_ver()
16039 if (tg3_flag(tp, ENABLE_APE)) { in tg3_read_fw_ver()
16053 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_rx_ret_ring_size()
16055 else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) in tg3_rx_ret_ring_size()
16154 if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || in tg3_detect_asic_rev()
16165 tg3_flag(tp, 57765_PLUS)) in tg3_detect_asic_rev()
16175 tg3_flag(tp, 5755_PLUS) || in tg3_detect_asic_rev()
16176 tg3_flag(tp, 5780_CLASS)) in tg3_detect_asic_rev()
16180 tg3_flag(tp, 5750_PLUS)) in tg3_detect_asic_rev()
16335 if (tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16364 else if (tg3_flag(tp, 57765_PLUS)) in tg3_get_invariants()
16366 else if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16369 else if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16387 if (tg3_flag(tp, HW_TSO_1) || in tg3_get_invariants()
16388 tg3_flag(tp, HW_TSO_2) || in tg3_get_invariants()
16389 tg3_flag(tp, HW_TSO_3) || in tg3_get_invariants()
16390 tg3_flag(tp, FW_TSO)) { in tg3_get_invariants()
16410 if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16419 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16424 if (tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16441 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16454 if (tg3_flag(tp, 57765_PLUS) && in tg3_get_invariants()
16458 if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16459 tg3_flag(tp, 5780_CLASS) || in tg3_get_invariants()
16460 tg3_flag(tp, USE_JUMBO_BDFLAG)) in tg3_get_invariants()
16491 } else if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16492 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16511 !tg3_flag(tp, PCI_EXPRESS)) in tg3_get_invariants()
16539 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16585 if (tg3_flag(tp, PCIX_TARGET_HWBUG)) in tg3_get_invariants()
16588 (tg3_flag(tp, PCI_EXPRESS) && in tg3_get_invariants()
16600 if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { in tg3_get_invariants()
16602 if (tg3_flag(tp, MBOX_WRITE_REORDER)) in tg3_get_invariants()
16606 if (tg3_flag(tp, ICH_WORKAROUND)) { in tg3_get_invariants()
16629 (tg3_flag(tp, PCIX_MODE) && in tg3_get_invariants()
16644 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16645 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16665 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_get_invariants()
16680 if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { in tg3_get_invariants()
16686 if (tg3_flag(tp, ENABLE_APE)) { in tg3_get_invariants()
16708 tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_get_invariants()
16719 tg3_flag(tp, 57765_CLASS)) in tg3_get_invariants()
16726 if (tg3_flag(tp, IS_NIC)) in tg3_get_invariants()
16742 if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) in tg3_get_invariants()
16773 if (tg3_flag(tp, 5705_PLUS) && in tg3_get_invariants()
16777 !tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16798 if (tg3_flag(tp, CPMU_PRESENT)) in tg3_get_invariants()
16850 !tg3_flag(tp, PCIX_TARGET_HWBUG)) { in tg3_get_invariants()
16876 !tg3_flag(tp, NO_NVRAM)) in tg3_get_invariants()
16887 if (!tg3_flag(tp, IS_5788) && in tg3_get_invariants()
16890 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_get_invariants()
16900 if (tg3_flag(tp, ENABLE_APE)) in tg3_get_invariants()
16953 if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) in tg3_get_invariants()
16959 tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16980 if (tg3_flag(tp, ASPM_WORKAROUND)) in tg3_get_invariants()
17025 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_get_device_address()
17033 tg3_flag(tp, 5780_CLASS)) { in tg3_get_device_address()
17040 } else if (tg3_flag(tp, 5717_PLUS)) { in tg3_get_device_address()
17065 if (!tg3_flag(tp, NO_NVRAM) && in tg3_get_device_address()
17115 !tg3_flag(tp, PCI_EXPRESS)) in tg3_calc_dma_bndry()
17128 if (tg3_flag(tp, 57765_PLUS)) { in tg3_calc_dma_bndry()
17147 if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17172 } else if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17345 if (tg3_flag(tp, 57765_PLUS)) in tg3_test_dma()
17348 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_test_dma()
17351 } else if (!tg3_flag(tp, PCIX_MODE)) { in tg3_test_dma()
17367 if (tg3_flag(tp, 40BIT_DMA_BUG) && in tg3_test_dma()
17390 if (tg3_flag(tp, ONE_DMA_AT_ONCE)) in tg3_test_dma()
17503 if (tg3_flag(tp, 57765_PLUS)) { in tg3_init_bufmgr_config()
17517 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_bufmgr_config()
17591 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_bus_string()
17594 } else if (tg3_flag(tp, PCIX_MODE)) { in tg3_bus_string()
17613 if (tg3_flag(tp, PCI_HIGH_SPEED)) in tg3_bus_string()
17618 if (tg3_flag(tp, PCI_32BIT)) in tg3_bus_string()
17649 if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_coal()
17796 if (tg3_flag(tp, IS_5788)) in tg3_init_one()
17798 else if (tg3_flag(tp, 40BIT_DMA_BUG)) { in tg3_init_one()
17837 if (tg3_flag(tp, 5755_PLUS)) in tg3_init_one()
17845 if ((tg3_flag(tp, HW_TSO_1) || in tg3_init_one()
17846 tg3_flag(tp, HW_TSO_2) || in tg3_init_one()
17847 tg3_flag(tp, HW_TSO_3)) && in tg3_init_one()
17850 if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { in tg3_init_one()
17853 if (tg3_flag(tp, HW_TSO_3) || in tg3_init_one()
17872 !tg3_flag(tp, CPMU_PRESENT)) in tg3_init_one()
17884 !tg3_flag(tp, TSO_CAPABLE) && in tg3_init_one()
17920 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_init_one()
17979 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_init_one()
18012 tg3_flag(tp, USE_LINKCHG_REG) != 0, in tg3_init_one()
18014 tg3_flag(tp, ENABLE_ASF) != 0, in tg3_init_one()
18015 tg3_flag(tp, TSO_CAPABLE) != 0); in tg3_init_one()
18062 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_remove_one()