Lines Matching refs:tg3_asic_rev
638 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_write_mem()
663 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_read_mem()
691 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock_init()
727 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock()
747 if (tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_ape_lock()
788 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
808 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
1510 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_start()
1615 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_init()
1836 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_poll_fw()
2037 tg3_asic_rev(tp) != ASIC_REV_5785) in tg3_adjust_link()
2064 if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_adjust_link()
2256 if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable) in tg3_phy_toggle_apd()
2446 (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_phy_eee_enable()
2447 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_eee_enable()
2653 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2668 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_phy_reset()
2669 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_phy_reset()
2670 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_phy_reset()
2678 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_phy_reset()
2776 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2809 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2810 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2819 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2820 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2833 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_pwrsrc_switch_to_vmain()
2834 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_pwrsrc_switch_to_vmain()
2835 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_pwrsrc_switch_to_vmain()
2858 tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_die_with_vmain()
2859 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_pwrsrc_die_with_vmain()
2882 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_switch_to_vaux()
2883 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_pwrsrc_switch_to_vaux()
2915 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_pwrsrc_switch_to_vaux()
2987 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_frob_aux_power()
2988 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_frob_aux_power()
2989 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_frob_aux_power()
3038 switch (tg3_asic_rev(tp)) { in tg3_phy_power_bug()
3063 switch (tg3_asic_rev(tp)) { in tg3_phy_led_bug()
3083 if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_power_down_phy()
3095 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_phy()
3522 if (tg3_asic_rev(tp) != ASIC_REV_5752 && in tg3_nvram_write_block_buffered()
3656 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_halt_cpu()
3730 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3735 if (tg3_asic_rev(tp) != ASIC_REV_57766) { in tg3_load_firmware_cpu()
3935 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_load_tso_firmware()
3996 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in __tg3_set_mac_addr()
3997 tg3_asic_rev(tp) == ASIC_REV_5704) { in __tg3_set_mac_addr()
4114 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4162 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_power_down_prepare()
4195 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4196 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_power_down_prepare()
4207 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4212 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4213 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4235 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4236 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4388 switch (tg3_asic_rev(tp)) { in tg3_phy_autoneg_cfg()
4466 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_phy_copper_begin()
4767 if (tg3_asic_rev(tp) != ASIC_REV_5717) in tg3_setup_eee()
4806 if ((tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_setup_copper_phy()
4807 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_setup_copper_phy()
4808 tg3_asic_rev(tp) == ASIC_REV_5705) && in tg3_setup_copper_phy()
4868 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_setup_copper_phy()
4869 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_setup_copper_phy()
5036 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_setup_copper_phy()
5067 if (tg3_asic_rev(tp) == ASIC_REV_5700 && in tg3_setup_copper_phy()
5830 if ((tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_setup_fiber_mii_phy()
5831 tg3_asic_rev(tp) == ASIC_REV_5720) && in tg3_setup_fiber_mii_phy()
5882 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
5951 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
6105 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_setup_phy()
6106 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_setup_phy()
7667 if (tg3_asic_rev(tp) == ASIC_REV_5762 && mss) { in tg3_4g_tso_overflow_test()
7810 if (tg3_asic_rev(tp) != ASIC_REV_5701) in tigon3_dma_hwbug_workaround()
8008 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_start_xmit()
8189 tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_mac_loopback()
8248 tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_phy_lpbk_set()
8272 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_phy_lpbk_set()
9020 switch (tg3_asic_rev(tp)) { in tg3_override_clk()
9041 switch (tg3_asic_rev(tp)) { in tg3_restore_clk()
9086 if (tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_chip_reset()
9125 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_chip_reset()
9135 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9147 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_chip_reset()
9266 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_chip_reset()
9291 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9303 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_chip_reset()
9523 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_tx_rcbs_disable()
9565 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_rx_ret_rcbs_disable()
9566 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_rx_ret_rcbs_disable()
9676 tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_setup_rxbd_thresholds()
9677 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_setup_rxbd_thresholds()
9680 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_setup_rxbd_thresholds()
9681 tg3_asic_rev(tp) == ASIC_REV_5787) in tg3_setup_rxbd_thresholds()
9859 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_lso_rd_dma_workaround_bit()
9922 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_reset_hw()
10047 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_reset_hw()
10048 tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_reset_hw()
10051 } else if (tg3_asic_rev(tp) != ASIC_REV_5784 && in tg3_reset_hw()
10052 tg3_asic_rev(tp) != ASIC_REV_5761) { in tg3_reset_hw()
10102 } else if (tg3_asic_rev(tp) != ASIC_REV_5705) { in tg3_reset_hw()
10104 if (tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_reset_hw()
10142 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_reset_hw()
10144 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_reset_hw()
10145 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_reset_hw()
10212 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10254 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10255 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10275 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_reset_hw()
10278 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10279 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10280 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10285 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10288 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_reset_hw()
10299 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10313 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10314 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10317 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10318 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10321 if (tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_reset_hw()
10322 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10323 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10324 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_reset_hw()
10328 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10335 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10346 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10347 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10348 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10351 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10434 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_reset_hw()
10452 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_reset_hw()
10456 if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_reset_hw()
10491 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10507 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_reset_hw()
10518 if (tg3_asic_rev(tp) == ASIC_REV_5703) { in tg3_reset_hw()
10521 } else if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_reset_hw()
10532 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10533 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_reset_hw()
10550 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_reset_hw()
10579 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10595 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_reset_hw()
10598 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10599 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10623 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10648 if ((tg3_asic_rev(tp) == ASIC_REV_5704) && in tg3_reset_hw()
10670 if (tg3_asic_rev(tp) == ASIC_REV_5704 && in tg3_reset_hw()
10677 tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_reset_hw()
10942 if (tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_periodic_fetch_stats()
10943 tg3_asic_rev(tp) != ASIC_REV_5762 && in tg3_periodic_fetch_stats()
10995 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_timer()
11131 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_timer_init()
11727 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_open()
11801 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_calc_crc_errors()
11802 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_calc_crc_errors()
13387 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_test_memory()
13391 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_test_memory()
13503 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_run_loopback()
13689 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_test_loopback()
14281 if (tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_change_mtu()
14282 tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_change_mtu()
14283 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_change_mtu()
14284 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_change_mtu()
14397 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_nvram_info()
14838 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
14922 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14969 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14983 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
15018 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_nvram_init()
15019 tg3_asic_rev(tp) != ASIC_REV_5701) { in tg3_nvram_init()
15032 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_nvram_init()
15034 else if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_nvram_init()
15036 else if (tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_nvram_init()
15037 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_nvram_init()
15038 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_nvram_init()
15040 else if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_nvram_init()
15042 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_nvram_init()
15044 else if (tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_nvram_init()
15047 else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_nvram_init()
15048 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_nvram_init()
15050 else if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_nvram_init()
15051 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_nvram_init()
15164 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_eeprom_hw_cfg()
15192 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_eeprom_hw_cfg()
15193 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_eeprom_hw_cfg()
15194 tg3_asic_rev(tp) != ASIC_REV_5703 && in tg3_get_eeprom_hw_cfg()
15198 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_get_eeprom_hw_cfg()
15201 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_eeprom_hw_cfg()
15202 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_eeprom_hw_cfg()
15203 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_eeprom_hw_cfg()
15251 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15252 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_get_eeprom_hw_cfg()
15265 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_eeprom_hw_cfg()
15284 if ((tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15285 tg3_asic_rev(tp) == ASIC_REV_5701) && in tg3_get_eeprom_hw_cfg()
15333 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_eeprom_hw_cfg()
15342 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_eeprom_hw_cfg()
15577 (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_probe()
15578 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_phy_probe()
15579 tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_phy_probe()
15580 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_phy_probe()
15581 (tg3_asic_rev(tp) == ASIC_REV_5717 && in tg3_phy_probe()
15583 (tg3_asic_rev(tp) == ASIC_REV_57765 && in tg3_phy_probe()
15707 if (tg3_asic_rev(tp) == ASIC_REV_5717) { in tg3_read_vpd()
15715 } else if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_read_vpd()
15726 } else if (tg3_asic_rev(tp) == ASIC_REV_57765) { in tg3_read_vpd()
15741 } else if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_read_vpd()
15752 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_read_vpd()
15993 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_read_otp_ver()
16099 if (tg3_asic_rev(tp) == ASIC_REV_USE_PROD_ID_REG) { in tg3_detect_asic_rev()
16145 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_detect_asic_rev()
16146 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_detect_asic_rev()
16147 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_detect_asic_rev()
16150 if (tg3_asic_rev(tp) == ASIC_REV_57765 || in tg3_detect_asic_rev()
16151 tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_detect_asic_rev()
16155 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_detect_asic_rev()
16159 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_detect_asic_rev()
16160 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_detect_asic_rev()
16161 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_detect_asic_rev()
16162 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_detect_asic_rev()
16163 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_detect_asic_rev()
16164 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_detect_asic_rev()
16168 if (tg3_asic_rev(tp) == ASIC_REV_5780 || in tg3_detect_asic_rev()
16169 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_detect_asic_rev()
16172 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_detect_asic_rev()
16173 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_detect_asic_rev()
16174 tg3_asic_rev(tp) == ASIC_REV_5906 || in tg3_detect_asic_rev()
16179 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_detect_asic_rev()
16189 if ((tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_10_100_only_device()
16195 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_10_100_only_device()
16297 if (tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_get_invariants()
16357 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16358 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_get_invariants()
16367 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16372 if (tg3_asic_rev(tp) == ASIC_REV_5750 && in tg3_get_invariants()
16375 } else if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_invariants()
16376 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_invariants()
16380 if (tg3_asic_rev(tp) == ASIC_REV_5705) in tg3_get_invariants()
16405 if (tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_get_invariants()
16414 (tg3_asic_rev(tp) == ASIC_REV_5714 && in tg3_get_invariants()
16420 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16436 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16437 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_invariants()
16442 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16445 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_get_invariants()
16448 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16449 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16450 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16451 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16473 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16477 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16478 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_get_invariants()
16485 } else if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_get_invariants()
16518 if (tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_get_invariants()
16587 else if (tg3_asic_rev(tp) == ASIC_REV_5701 || in tg3_get_invariants()
16621 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16630 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16631 tg3_asic_rev(tp) == ASIC_REV_5701))) in tg3_get_invariants()
16643 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16651 } else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16652 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16653 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_get_invariants()
16658 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_get_invariants()
16707 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16714 else if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_get_invariants()
16717 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16718 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_get_invariants()
16732 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16746 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16755 if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16759 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16760 (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16775 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_invariants()
16776 tg3_asic_rev(tp) != ASIC_REV_57780 && in tg3_get_invariants()
16778 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16779 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_get_invariants()
16780 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16781 tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_get_invariants()
16791 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_invariants()
16809 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16810 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_get_invariants()
16817 if (tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_get_invariants()
16818 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_get_invariants()
16827 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16828 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16875 if (tg3_asic_rev(tp) == ASIC_REV_57766 && in tg3_get_invariants()
16882 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16888 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_get_invariants()
16921 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16931 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16941 tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16958 if (tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16975 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_invariants()
16976 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_get_invariants()
16977 tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_get_invariants()
17032 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_device_address()
17045 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_device_address()
17113 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_calc_dma_bndry()
17114 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_calc_dma_bndry()
17352 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_test_dma()
17353 tg3_asic_rev(tp) == ASIC_REV_5750) in tg3_test_dma()
17358 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17359 tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_test_dma()
17368 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17373 if (tg3_asic_rev(tp) == ASIC_REV_5703) in tg3_test_dma()
17380 } else if (tg3_asic_rev(tp) == ASIC_REV_5780) { in tg3_test_dma()
17383 } else if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_test_dma()
17393 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17394 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17397 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_test_dma()
17398 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_test_dma()
17418 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_test_dma()
17419 tg3_asic_rev(tp) != ASIC_REV_5701) in tg3_test_dma()
17524 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_init_bufmgr_config()
17854 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_init_one()
17855 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_init_one()
17857 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_init_one()
17858 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_init_one()
17871 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_init_one()
17964 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_init_one()
17965 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_init_one()
17966 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_init_one()