Lines Matching refs:GRC_MODE
3569 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3570 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3580 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3581 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6440 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9257 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9938 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9942 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9948 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9953 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9957 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9964 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9975 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9979 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
9987 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10081 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16826 val = tr32(GRC_MODE); in tg3_get_invariants()
16837 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()