269 	link_status = REG_RD(bp, params->shmem_base +  in bnx2x_check_lfa()
2107 	REG_WR(bp, params->shmem_base +  in bnx2x_update_mng()
2889 		eee_mode = ((REG_RD(bp, params->shmem_base +  in bnx2x_eee_calc_timer()
3066 	board_cfg = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3074 	sfp_ctrl = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3812 	if (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3852 		wc_lane_config = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
4004 		cfg_tap_val = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_set_10G_XFI()
4330 						u32 shmem_base, u8 port,  in bnx2x_get_mod_abs_int_cfg()  argument
4337 		cfg_pin = (REG_RD(bp, shmem_base +  in bnx2x_get_mod_abs_int_cfg()
4374 				      params->shmem_base, params->port,  in bnx2x_is_sfp_module_plugged()
4414 		serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_runtime()
4477 	cfg_pin = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e3_set_transmitter()
4498 	serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_init()
4813 	vars->link_status = REG_RD(bp, params->shmem_base +  in bnx2x_link_status_update()
4830 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
4847 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
7418 	if (REG_RD(bp, params->shmem_base +  in bnx2x_8073_config_init()
7706 	bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0);  in bnx2x_8705_config_init()
7793 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e1e2_set_transmitter()
7925 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_power_module()
8221 	sync_offset = params->shmem_base +  in bnx2x_get_edc_mode()
8269 	val = REG_RD(bp, params->shmem_base +  in bnx2x_verify_sfp_module()
8534 	u32 fault_led_gpio = REG_RD(bp, params->shmem_base +  in bnx2x_set_e1e2_module_fault_led()
8567 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_set_e3_module_fault_led()
8689 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_module_detection()
8750 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,  in bnx2x_handle_module_detect_int()
8983 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8706_config_init()
9356 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8727_config_init()
9386 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_8727_handle_mod_abs()
10159 	pair_swap = REG_RD(bp, params->shmem_base +  in bnx2x_848xx_pair_swap_cfg()
10236 	shmem_base_path[0] = params->shmem_base;  in bnx2x_84833_hw_reset_phy()
10411 		u32 cms_enable = REG_RD(bp, params->shmem_base +  in bnx2x_848x3_config_init()
11062 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_config_init()
11303 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_link_reset()
12158 static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,  in bnx2x_populate_preemphasis()  argument
12170 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12174 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12178 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12182 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12195 static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_config()  argument
12201 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
12206 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
12217 static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,  in bnx2x_populate_int_phy()  argument
12222 	u32 switch_cfg = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
12240 		serdes_net_if = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
12350 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, INT_PHY);  in bnx2x_populate_int_phy()
12356 				  u32 shmem_base,  in bnx2x_populate_ext_phy()  argument
12363 	ext_phy_config = bnx2x_get_ext_phy_config(bp, shmem_base,  in bnx2x_populate_ext_phy()
12430 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12436 	config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12439 		phy->ver_addr = shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12482 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12487 		return bnx2x_populate_int_phy(bp, shmem_base, port, phy);  in bnx2x_populate_phy()
12489 	return bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12501 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12504 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12509 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12512 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12624 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12647 		sync_offset = params->shmem_base +  in bnx2x_phy_probe()
13211 		u32 shmem_base, shmem2_base;  in bnx2x_8073_common_init_phy()  local
13214 			shmem_base = shmem_base_path[0];  in bnx2x_8073_common_init_phy()
13218 			shmem_base = shmem_base_path[port];  in bnx2x_8073_common_init_phy()
13224 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
13338 		u32 shmem_base, shmem2_base;  in bnx2x_8726_common_init_phy()  local
13342 			shmem_base = shmem_base_path[0];  in bnx2x_8726_common_init_phy()
13345 			shmem_base = shmem_base_path[port];  in bnx2x_8726_common_init_phy()
13349 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
13369 static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_reset_gpio()  argument
13373 	u32 phy_gpio_reset = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_reset_gpio()
13451 		u32 shmem_base, shmem2_base;  in bnx2x_8727_common_init_phy()  local
13455 			shmem_base = shmem_base_path[0];  in bnx2x_8727_common_init_phy()
13459 			shmem_base = shmem_base_path[port];  in bnx2x_8727_common_init_phy()
13465 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13634 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_check_over_curr()
13805 	cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region,  in bnx2x_sfp_tx_fault_detection()
13948 		if ((REG_RD(bp, params->shmem_base +  in bnx2x_period_func()
13968 			     u32 shmem_base,  in bnx2x_fan_failure_det_req()  argument
13976 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
14011 			    u32 chip_id, u32 shmem_base, u32 shmem2_base,  in bnx2x_init_mod_abs_int()  argument
14019 					      shmem_base,  in bnx2x_init_mod_abs_int()
14028 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()
14055 	sync_offset = shmem_base +  in bnx2x_init_mod_abs_int()