1450 	u8 phy_index;  in bnx2x_set_mdio_emac_per_phy()  local
1452 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_set_mdio_emac_per_phy()
1453 	      phy_index++)  in bnx2x_set_mdio_emac_per_phy()
1455 				   params->phy[phy_index].mdio_ctrl);  in bnx2x_set_mdio_emac_per_phy()
3191 	u8 phy_index;  in bnx2x_phy_read()  local
3195 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_read()
3196 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_read()
3198 					       &params->phy[phy_index], devad,  in bnx2x_phy_read()
3208 	u8 phy_index;  in bnx2x_phy_write()  local
3212 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_write()
3213 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_write()
3215 						&params->phy[phy_index], devad,  in bnx2x_phy_write()
3423 	u8 actual_phy_idx, phy_index, link_cfg_idx;  in set_phy_vars()  local
3426 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in set_phy_vars()
3427 	      phy_index++) {  in set_phy_vars()
3428 		link_cfg_idx = LINK_CONFIG_IDX(phy_index);  in set_phy_vars()
3429 		actual_phy_idx = phy_index;  in set_phy_vars()
3431 			if (phy_index == EXT_PHY1)  in set_phy_vars()
3433 			else if (phy_index == EXT_PHY2)  in set_phy_vars()
6449 	u16 gp_status = 0, phy_index = 0;  in bnx2x_test_link()  local
6499 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_test_link()
6500 		      phy_index++) {  in bnx2x_test_link()
6501 			serdes_phy_type = ((params->phy[phy_index].media_type ==  in bnx2x_test_link()
6503 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6505 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6507 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6512 			if (params->phy[phy_index].read_status) {  in bnx2x_test_link()
6514 					params->phy[phy_index].read_status(  in bnx2x_test_link()
6515 						&params->phy[phy_index],  in bnx2x_test_link()
6529 	u8 phy_index, non_ext_phy;  in bnx2x_link_initialize()  local
6571 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_initialize()
6572 		      phy_index++) {  in bnx2x_link_initialize()
6578 			if (params->phy[phy_index].supported &  in bnx2x_link_initialize()
6582 			if (phy_index == EXT_PHY2 &&  in bnx2x_link_initialize()
6589 			params->phy[phy_index].config_init(  in bnx2x_link_initialize()
6590 				&params->phy[phy_index],  in bnx2x_link_initialize()
6804 	u8 link_10g_plus, phy_index;  in bnx2x_link_update()  local
6813 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_link_update()
6814 	      phy_index++) {  in bnx2x_link_update()
6815 		phy_vars[phy_index].flow_ctrl = 0;  in bnx2x_link_update()
6816 		phy_vars[phy_index].link_status = 0;  in bnx2x_link_update()
6817 		phy_vars[phy_index].line_speed = 0;  in bnx2x_link_update()
6818 		phy_vars[phy_index].duplex = DUPLEX_FULL;  in bnx2x_link_update()
6819 		phy_vars[phy_index].phy_link_up = 0;  in bnx2x_link_update()
6820 		phy_vars[phy_index].link_up = 0;  in bnx2x_link_update()
6821 		phy_vars[phy_index].fault_detected = 0;  in bnx2x_link_update()
6823 		phy_vars[phy_index].eee_status = vars->eee_status;  in bnx2x_link_update()
6855 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6856 	      phy_index++) {  in bnx2x_link_update()
6857 		struct bnx2x_phy *phy = &params->phy[phy_index];  in bnx2x_link_update()
6862 					       &phy_vars[phy_index]);  in bnx2x_link_update()
6865 				   phy_index);  in bnx2x_link_update()
6868 				   phy_index);  in bnx2x_link_update()
6874 			active_external_phy = phy_index;  in bnx2x_link_update()
6960 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6961 	      phy_index++) {  in bnx2x_link_update()
6962 		if (params->phy[phy_index].flags &  in bnx2x_link_update()
6965 						 phy_index ==  in bnx2x_link_update()
12160 				     u8 phy_index)  in bnx2x_populate_preemphasis()  argument
12169 		if (phy_index == INT_PHY || phy_index == EXT_PHY1) {  in bnx2x_populate_preemphasis()
12196 				    u8 phy_index, u8 port)  in bnx2x_get_ext_phy_config()  argument
12199 	switch (phy_index) {  in bnx2x_get_ext_phy_config()
12211 		DP(NETIF_MSG_LINK, "Invalid phy_index %d\n", phy_index);  in bnx2x_get_ext_phy_config()
12355 				  u8 phy_index,  in bnx2x_populate_ext_phy()  argument
12364 						  phy_index, port);  in bnx2x_populate_ext_phy()
12430 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12438 	if (phy_index == EXT_PHY1) {  in bnx2x_populate_ext_phy()
12476 		   phy_type, port, phy_index);  in bnx2x_populate_ext_phy()
12482 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12486 	if (phy_index == INT_PHY)  in bnx2x_populate_phy()
12489 	return bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12495 			      u8 phy_index)  in bnx2x_phy_def_cfg()  argument
12500 	if (phy_index == EXT_PHY2) {  in bnx2x_phy_def_cfg()
12519 	   phy_index, link_config, phy->speed_cap_mask);  in bnx2x_phy_def_cfg()
12602 	u8 phy_index, actual_phy_idx;  in bnx2x_phy_probe()  local
12611 	for (phy_index = INT_PHY; phy_index < MAX_PHYS;  in bnx2x_phy_probe()
12612 	      phy_index++) {  in bnx2x_phy_probe()
12613 		actual_phy_idx = phy_index;  in bnx2x_phy_probe()
12615 			if (phy_index == EXT_PHY1)  in bnx2x_phy_probe()
12617 			else if (phy_index == EXT_PHY2)  in bnx2x_phy_probe()
12622 			   phy_index, actual_phy_idx);  in bnx2x_phy_probe()
12624 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12629 				   phy_index);  in bnx2x_phy_probe()
12630 			for (phy_index = INT_PHY;  in bnx2x_phy_probe()
12631 			      phy_index < MAX_PHYS;  in bnx2x_phy_probe()
12632 			      phy_index++)  in bnx2x_phy_probe()
12666 		bnx2x_phy_def_cfg(params, phy, phy_index);  in bnx2x_phy_probe()
12793 		u8 phy_index;  in bnx2x_init_xgxs_loopback()  local
12794 		for (phy_index = EXT_PHY1;  in bnx2x_init_xgxs_loopback()
12795 		      phy_index < params->num_phys; phy_index++)  in bnx2x_init_xgxs_loopback()
12796 			if (params->phy[phy_index].config_loopback)  in bnx2x_init_xgxs_loopback()
12797 				params->phy[phy_index].config_loopback(  in bnx2x_init_xgxs_loopback()
12798 					&params->phy[phy_index],  in bnx2x_init_xgxs_loopback()
13052 	u8 phy_index, port = params->port, clear_latch_ind = 0;  in bnx2x_link_reset()  local
13095 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_reset()
13096 		      phy_index++) {  in bnx2x_link_reset()
13097 			if (params->phy[phy_index].link_reset) {  in bnx2x_link_reset()
13099 						  &params->phy[phy_index]);  in bnx2x_link_reset()
13100 				params->phy[phy_index].link_reset(  in bnx2x_link_reset()
13101 					&params->phy[phy_index],  in bnx2x_link_reset()
13104 			if (params->phy[phy_index].flags &  in bnx2x_link_reset()
13196 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8073_common_init_phy()  argument
13224 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
13322 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8726_common_init_phy()  argument
13349 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
13417 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8727_common_init_phy()  argument
13465 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13517 						u8 phy_index,  in bnx2x_84833_common_init_phy()  argument
13531 				     u32 shmem2_base_path[], u8 phy_index,  in bnx2x_ext_phy_common_init()  argument
13540 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13547 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13556 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13566 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13590 	u8 phy_index = 0;  in bnx2x_common_init_phy()  local
13612 	for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_common_init_phy()
13613 	      phy_index++) {  in bnx2x_common_init_phy()
13616 							  phy_index, 0);  in bnx2x_common_init_phy()
13620 						phy_index, ext_phy_type,  in bnx2x_common_init_phy()
13972 	u8 phy_index, fan_failure_det_req = 0;  in bnx2x_fan_failure_det_req()  local
13974 	for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_fan_failure_det_req()
13975 	      phy_index++) {  in bnx2x_fan_failure_det_req()
13976 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
13990 	u8 phy_index;  in bnx2x_hw_reset_phy()  local
13999 	for (phy_index = INT_PHY; phy_index < MAX_PHYS;  in bnx2x_hw_reset_phy()
14000 	      phy_index++) {  in bnx2x_hw_reset_phy()
14001 		if (params->phy[phy_index].hw_reset) {  in bnx2x_hw_reset_phy()
14002 			params->phy[phy_index].hw_reset(  in bnx2x_hw_reset_phy()
14003 				&params->phy[phy_index],  in bnx2x_hw_reset_phy()
14005 			params->phy[phy_index] = phy_null;  in bnx2x_hw_reset_phy()
14014 	u8 gpio_num = 0xff, gpio_port = 0xff, phy_index;  in bnx2x_init_mod_abs_int()  local
14026 		for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_init_mod_abs_int()
14027 		      phy_index++) {  in bnx2x_init_mod_abs_int()
14028 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()