Lines Matching refs:GRCBASE_EMAC0
1477 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_emac_init()
1813 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_emac_enable()
2568 emac_base = GRCBASE_EMAC0; in bnx2x_get_emac_base()
2572 emac_base = GRCBASE_EMAC0; in bnx2x_get_emac_base()
2577 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_get_emac_base()
2580 emac_base = (port) ? GRCBASE_EMAC0 : GRCBASE_EMAC1; in bnx2x_get_emac_base()
3314 u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_set_serdes_access()
5864 bnx2x_bits_dis(bp, GRCBASE_EMAC0 + port*0x400 + in bnx2x_emac_program()
5896 GRCBASE_EMAC0 + port*0x400 + EMAC_REG_EMAC_MODE, in bnx2x_emac_program()
6304 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_set_led()
13593 bnx2x_set_mdio_clk(bp, chip_id, GRCBASE_EMAC0); in bnx2x_common_init_phy()