166 static inline unsigned long br32(const struct b44 *bp, unsigned long reg)  in br32()  function
183 		u32 val = br32(bp, reg);  in b44_wait_bit()
210 	val = br32(bp, B44_CAM_DATA_LO);  in __b44_cam_read()
217 	val = br32(bp, B44_CAM_DATA_HI);  in __b44_cam_read()
251 	br32(bp, B44_IMASK);  in b44_disable_ints()
270 	*val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA;  in __b44_readphy()
367 	val = br32(bp, B44_RXCONFIG);  in __b44_set_flow_ctrl()
374 	val = br32(bp, B44_MAC_FLOW);  in __b44_set_flow_ctrl()
511 		*val++ += br32(bp, reg);  in b44_stats_update()
518 		*val++ += br32(bp, reg);  in b44_stats_update()
546 			u32 val = br32(bp, B44_TX_CTRL);  in b44_check_phy()
572 			u32 val = br32(bp, B44_TX_CTRL);  in b44_check_phy()
622 	cur  = br32(bp, B44_DMATX_STAT) & DMATX_STAT_CDMASK;  in b44_tx()
785 	prod  = br32(bp, B44_DMARX_STAT) & DMARX_STAT_CDMASK;  in b44_rx()
921 	istat = br32(bp, B44_ISTAT);  in b44_interrupt()
922 	imask = br32(bp, B44_IMASK);  in b44_interrupt()
948 		br32(bp, B44_ISTAT);  in b44_interrupt()
1046 		br32(bp, B44_DMATX_PTR);  in b44_start_xmit()
1275 		br32(bp, reg);  in b44_clear_stats()
1277 		br32(bp, reg);  in b44_clear_stats()
1297 		if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK) {  in b44_chip_reset()
1331 	br32(bp, B44_MDIO_CTRL);  in b44_chip_reset()
1333 	if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {  in b44_chip_reset()
1335 		br32(bp, B44_ENET_CTRL);  in b44_chip_reset()
1338 		u32 val = br32(bp, B44_DEVCTRL);  in b44_chip_reset()
1342 			br32(bp, B44_DEVCTRL);  in b44_chip_reset()
1374 		val = br32(bp, B44_CAM_CTRL);  in __b44_set_mac_addr()
1395 	val = br32(bp, B44_RXCONFIG);  in b44_set_mac_addr()
1446 	val = br32(bp, B44_ENET_CTRL);  in b44_init_hw()
1593 	val = br32(bp, B44_DEVCTRL);  in b44_setup_pseudo_magicp()
1604 		bw32(bp, SSB_TMSLOW, br32(bp, SSB_TMSLOW) | SSB_TMSLOW_PE);  in b44_setup_wol_pci()
1633 		val = br32(bp, B44_DEVCTRL);  in b44_setup_wol()
1741 	val = br32(bp, B44_RXCONFIG);  in __b44_set_rx_mode()
1762         	val = br32(bp, B44_CAM_CTRL);  in __b44_set_rx_mode()
2239 		u32 val = br32(bp, B44_TX_CTRL);  in b44_adjust_link()